We are using a SSM2603 codec in an application.
It is in "Slave mode" meaning the BCLK signal is coming into the SSM2603. There is a bit BCLKINV for register address 7 that is "BCLK Inversion control". Does this invert the incoming BCLK in slave mode or does it invert it coming out (when run in master mode).
Or both of the two cases?
We need to invert our BCLK going into the 2603 but the engineer here forgot to put an inverter on our board, so having the 2603 invert it saves us rework and adding an inverter to the board.
There is no explanation in the data sheet regarding this bit, if it inverts the clock coming in or going out or either.
I am the applications engineer for the SigmaDSP family of products, and in those products, the BCLK inversion control will invert the BCLK signal polarity in both master and slave modes. In many of our automotive audio codecs, for example the AD193x series, this is also the case. Therefore, I think it is quite likely that this is the case for the SSM2603 as well. However, I will need to confirm that with the applications engineer responsible for that product.
Many applications engineers, including myself, are overseas on a business trip at the moment, so our response times have been longer than usual this week.
I was able to confirm with the lead applications engineer for this product, who is based in Shanghai. The BCLKINV bit functions both to invert the BCLK signal output from the chip in master mode as well as to invert the polarity of the latching edge of the BCLK signal input to the chip in slave mode. So, you should be able to simply use this bit instead of using a standalone inverter in your system.