We're thinking about designing a high performance DA converter using the AD1955. The demoboard supports hdcd and sacd, which is what we want to use in our dac as well.
We're having some issues finding the exact encoding of hdcd so we would like to have the verilog/vhdl code of the lattice cpld/fpga on the AD1955 Demoboard. Can you please send us this information?
That is all the CPLD is there for is for routing of the clocks and data.
The AD1955 does not have an HDCD decoder and neither does the evaluation board. It is mentioned in the datasheet just as an example of using the external digital filter interface that could accept data from an HDCD decoder.
As far as I know, we do not make an HDCD decoder so I have no further information about it.
I think the eval board, ADSP-21266 is what you are looking for. It is the "Melody" platform but it makes no mention about HDCD decoding. I suppose it would be good to ask the DSP group this question and see if they have more information than I have. Here is a link to the eval board: