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AD1853 Obsolete
The AD1853 is the first audio DAC to support the 192 kHz Sample Rate now included in the DVD-Audio specification. The AD1853 is fully compatible with sample...
AD1853 on Analog.com

AD1955 Production
The AD1955 is a complete, high performance, single chip stereo digital audio playback system comprised of a multi-bit sigma-delta modulator, digital interpolation...
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AD1955 on Analog.com

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AD1853 introduces spurs when given a DC offset?

		
	
				

			

									
					    NeuralSwarm
					
							

            
            			
				
									
											
			
			
				
			
			
			    	
			                    
                
				                on Dec 9, 2014 
				
			
			
		

		
		                     
				
        		

		    
		    		    
		    			

			    
Hello EZ,

 
I'm attempting to use the AD1853's DAC as a control signal, but I've noticed strange spurs at the output whenever I introduce a DC offset.  For instance, if I excite the inputs with a positive DC offset of a few mV, then return to a 0mV 0Hz (0mV DC signal), then at the output of the DAC I see spurs at 20kHz, 40kHz, etc. on the frequency response.

 
If I increase the DC offset to 10mV, the spurs seems to start at 40kHz, and repeat at 40kHz intervals.  If I decrease the DC offset to below 0mV, then I see spurs before 20kHz, and repeating at regular intervals.

 
Worse, these spurs modulate with my actual control signal whenever I add it to the input of the system, and I need the full 20kHz for my control signal.

 
Has anyone seen this?  Is there any way to mitigate/remove these spurs?  I know the AD1955 is recommended to replace the AD1853, but I cannot use either part if these spurs occur.  

			

			
									
		                             
                        

    

                                            
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    •  Analog Employees  
    •  Super User  
    
            
						
                            
            
            				
            
                on Jan 9, 2015 9:13 PM
            
            
						
			            		
    
		
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    Hello Ryan,
    
 
    I have found in my testing of DACs that when I add DC the idle tones will move up out of band. But, then when I input a signal with the same peak voltage as the DC the tones will come back. However, these were very low level signals not -20 dBFS. At that level the signal should be enough to prevent the tones from appearing. The tones come in when the sigma-delta modulator has nothing to process but noise.
    
 
    So I am wondering if there is something else going on. Are you setting the chip mode to a rate that is close to the allowable MCLK frequencies when you are trying all these different sample rates? You could be in a situation where the internal filters are not working properly at the rate that you are running the part at.
    
 
    For instance, if you want to run at 100 kHz FS, then you will need to set the part to the INT4x mode and then feed it with an MCLK of 128xFS so that would be 12.80 MHz.
    
 
    The datasheet does not specify what the min and max sampling frequencies. It only lists a few rates and 32 kHz is the minimum rate it shows. So running at 25 kHz will probably work but you may start seeing filter issues.
    
 
    So what have you found since you posted this question?
    
 
    Thanks,
    
 
    Dave T
    
			
    

		
			
	      

		
		
	
    
	
    
		
    
			
		
    
	
    
	
    
		
						
						
				
						
				
				
		
		
    
			
		
    
	
    

    

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    •  Analog Employees  
    •  Super User  
    
            
						
                            
            
            				
            
                on Jan 9, 2015 9:13 PM
            
            
						
			            		
    
		
										0
					
	
    

		
		
    
		
    
                                
                                                            
    
					
    Hello Ryan,
    
 
    I have found in my testing of DACs that when I add DC the idle tones will move up out of band. But, then when I input a signal with the same peak voltage as the DC the tones will come back. However, these were very low level signals not -20 dBFS. At that level the signal should be enough to prevent the tones from appearing. The tones come in when the sigma-delta modulator has nothing to process but noise.
    
 
    So I am wondering if there is something else going on. Are you setting the chip mode to a rate that is close to the allowable MCLK frequencies when you are trying all these different sample rates? You could be in a situation where the internal filters are not working properly at the rate that you are running the part at.
    
 
    For instance, if you want to run at 100 kHz FS, then you will need to set the part to the INT4x mode and then feed it with an MCLK of 128xFS so that would be 12.80 MHz.
    
 
    The datasheet does not specify what the min and max sampling frequencies. It only lists a few rates and 32 kHz is the minimum rate it shows. So running at 25 kHz will probably work but you may start seeing filter issues.
    
 
    So what have you found since you posted this question?
    
 
    Thanks,
    
 
    Dave T
    
			
    

		
			
	      

		
		
	
    
	
    
		
    
			
		
    
	
    
	
    
		
						
						
				
						
				
				
		
		
    
			
		
    
	
    

    

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