Hi all,
my problem concerns the breaking of the input stage of the chip SSM2142 which occurs some time during a test cycle.
My testbench is attached for information.
How can see, the SSM2142 is connected to the "secondary" windings of a LVDT excited with a 5Vrms/10kHz sine wave on the "primary" windings by means of the SSM2143 differential line driver connected to an arbitray waveforms generator. An oscilloscope is connected to the differential output of the SSM2142 Line Driver.
After about 2hours of test I see that the signal at the output of the SSM2142 is reduced by 1\2. Measuring with a multimeter the resistance at the input of SSM2142 I found that the value was lowered to about 92.76ohm. In normal condition I measure a resistance of about 50kohm.
Do you have idea why this could happen?
What is it the possible root cause of the input resistance "breaking" of the SSM2142'buffer stage of the cross-coupled topology?
Note: The "Test Board" is "hot inserted" in the test bench (i.e. the power supply and the signal generator are "ON" and "fully operational").
Best Regards
Francesco Carbone