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I have designed the ADAU1702 into an engineering breadboard, using the MINIB eval board as the basis. I've replicated the circuitry as exactly as possible, but cannot get communications working with SigmaStudio via the ADUSB2Z adaptor board... yet when

I have designed the ADAU1702 into an engineering breadboard, using the MINIB eval board as the basis of the design. I've replicated the circuitry as exactly as possible, but cannot get communications working with SigmaStudio via the ADUSB2Z adaptor board... yet when I plug into a genuine ADI eval board, it works fine. I'm wondering about the use of pin 2 on J8 of the mini eval board... it appears to have the label 'USB_CLK', but there is no other signal with that name in the schematic.... yet the ADUSB2Z adaptor board appears to make a connection to this pin via the flat cable. Can you tell me what this signal is, and whether it is essential for communications?

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  • The problem is solved, and indeed, it was related to the WP pin. However, it does demonstrate a major problem with the documentation for this part.

    For one thing, the pin is described in the pin list documentation as an open collector output when in self-boot mode, which is the mode I am planning to use.... the pin description list says to pull the WP pin up to 3.3V when in self-boot mode.... but doesn't say anything about the pin needing to be high in order to program the part. The only part of that pin description which implies that the pin is used as an input is related to SPI operation, which I'm not using.

    Next, figure 37 in the data sheet, which shows a schematic for self-boot mode, shows a direct connection between WP and the corresponding EEPROM pin... but without any pull-up.

    figure 38 in the data sheet shows a schematic for 'I2C mode' operation.... but shows NO connection to the WP pin.

    These inconsistencies were part of the reason I've been hung up on this problem. Admittedly, I deviated from the Eval board schematic, which includes a literal slide switch on the connection between the WP pin, and the corresponding pin on the EEPROM, whereby the EEPROM could be enabled while not disturbing the WP pull-up connection. Had I included the same literal switch, I wouldn't have had the problem.

    Thanks to everyone who helped out on this issue.

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  • The problem is solved, and indeed, it was related to the WP pin. However, it does demonstrate a major problem with the documentation for this part.

    For one thing, the pin is described in the pin list documentation as an open collector output when in self-boot mode, which is the mode I am planning to use.... the pin description list says to pull the WP pin up to 3.3V when in self-boot mode.... but doesn't say anything about the pin needing to be high in order to program the part. The only part of that pin description which implies that the pin is used as an input is related to SPI operation, which I'm not using.

    Next, figure 37 in the data sheet, which shows a schematic for self-boot mode, shows a direct connection between WP and the corresponding EEPROM pin... but without any pull-up.

    figure 38 in the data sheet shows a schematic for 'I2C mode' operation.... but shows NO connection to the WP pin.

    These inconsistencies were part of the reason I've been hung up on this problem. Admittedly, I deviated from the Eval board schematic, which includes a literal slide switch on the connection between the WP pin, and the corresponding pin on the EEPROM, whereby the EEPROM could be enabled while not disturbing the WP pull-up connection. Had I included the same literal switch, I wouldn't have had the problem.

    Thanks to everyone who helped out on this issue.

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