We have an SSM2537 evaluation board, which is hooked up to our custom FPGA setup. The device seems to work fine when we stream audio PDM at either 3 or 6MHz. But when we send a control pattern (as defined in the datasheet table 8), there is no reaction. We have tried to modify the PDM signal in all possible ways imaginable (e.g. sending patterns on both left and right channels, or alternating), tried sending either 130 repeats or 40000 repeats. Nothing happens. Looking at the oscilloscope, the sent pattern looks fine. VHDL simulation says the pattern repeats fine.
Is there anything we can do about this. Is there something in the patterns to consider, that is not obvious from the datasheet? Is there errata for or newer versions than "revision 0" of the SSM2357 datasheet?
And finally - when sending the 'mute' pattern 0x66, should the device stay muted even when the PDM data switches back from mute to data - untill a clock-loss powerdown is done, or is the mute effective only during when the pattern is sent?
thank you in advance,