We seem to be having issues with the SSM2167 pulses can be heard on the output.
I believe the end of the question SSM2167 Gate question, seems to hint at the same issue regarding "pumping noise".
The problem seems to occur on the triggers of the noise threshold. Sometimes if the threshold is set just right, the triggers become periodic (just over 1Hz - variable depending on device), but we have found a fix where increasing Cavg to the datasheet max of 22uF at the very least prevents the periodic pulsing. However, the on - off trigger can still be heard quite clearly on the output.
When these problems occur we can see a very slight, but sudden DC shift of approximately 20mV at the VCA input. The strange thing seems to be that this pulsing occurs on most devices, but not all of them.
We have tried filtering the input, output, and even between the buffer and VCA stages. When filtering before the VCA stage this DC offset seems to be removed or minimised but we can still hear the pulsing at the output. To note, we use ~25k as the maximum Rgate, but have tried a datasheet recommended 5k solution which has the same results. We have also increased the supply capacitance and added a 100nF cap in parallel, decreased the input decoupling capacitor to datasheet recommended values, and adjusted the loading to various levels, but have had no luck getting a consistent solution so far.
I've attached a basic schematic of this stage of our initial design, which I believe is fairly standard.
Would you happen to have any advice regarding the issue, or any ways as to minimise the noise pulse generated by the DC offset?