ANC hardware selection

Hello,

I'm working on implementing an active noise control algorithm. I am currently working on an ADSP-221489 EZKIT LITE, because we had one lying around. I am quite new to these things, but I am beginning to suspect that this board and the AD1939 codec on it are not quite suited to my application. I got the algorithm to work, but I feel the system is not working as well as it could be, mainly due to latency issues. I am wondering which hardware would be better for me. I hope you can help. Below I have listed some information about my application:

- Active noise control system with adaptive controller and adaptive plant model.

- Preferred sample frequency: 8 kHz.

- 2 ADCs/input ports.

- 2 DACs/output ports.

- Low latency (currently multiple ms's)

If you need more specific details to answer my question, please let me know.

Regards,

Thijs

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  • Hello Thijs,

    I assume you do not want to use the on-board codec. So those signals are available on SW1 and SW2. I think this is the easiest way to do this. I do not have this eval board since I do not support the ADSP-21489 so I am only looking at the schematic in the user guide. So I think you will have to solder on some wires and I would say the best place is on the pins of the dip switches. This will be a mechanically strong place for them and easy for you to get to. Then you can use the dip switches to shut off the connection to the on-board codec. So connect the wires to the DSP side of the dip switches.

    Here are the signals from the codec and what they do:

    On SW1:

    ASDATA1, this is the ADC data that is going from the ADCs to the DSP.

    ASDATA2, this is the second data line. The codec has four ADCs like the 1772 does.

    Note: on the 1772 these two signals are labeled ADC_DATA0 and ADC_DATA1.

    ABCLK, this is the bit clock connection for the ADC side of the codec.

    ALRCLK, this is the left right clock for the ADC side of the codec.

    On SW2:

    DSDATA1-4, This is the serial data going to the DACs. This codec has 8 channels so the 1772 only has one of these SDATA lines since it only had two DACs.

    DBCLK, This is the bit clock connection to the DAC side of the codec

    DLRCLK, This is the Left Right clock connection to the DAC side of the codec.

    Note, that the codec used on this evaluation board can operate the ADCs and the DACs on two different clocks. The 1772 only needs one set of BCLK and LRCLK to operate both the ADC and DAC serial ports.

    I was looking at Sheet 4 of the EZ-Board schematics and it is page 90 of the PDF that I have on my computer. This is the ADSP-21489 EZ-BoardTM Evaluation System Manual.

    I hope this helps.

    Thanks,

    Dave T

Reply
  • Hello Thijs,

    I assume you do not want to use the on-board codec. So those signals are available on SW1 and SW2. I think this is the easiest way to do this. I do not have this eval board since I do not support the ADSP-21489 so I am only looking at the schematic in the user guide. So I think you will have to solder on some wires and I would say the best place is on the pins of the dip switches. This will be a mechanically strong place for them and easy for you to get to. Then you can use the dip switches to shut off the connection to the on-board codec. So connect the wires to the DSP side of the dip switches.

    Here are the signals from the codec and what they do:

    On SW1:

    ASDATA1, this is the ADC data that is going from the ADCs to the DSP.

    ASDATA2, this is the second data line. The codec has four ADCs like the 1772 does.

    Note: on the 1772 these two signals are labeled ADC_DATA0 and ADC_DATA1.

    ABCLK, this is the bit clock connection for the ADC side of the codec.

    ALRCLK, this is the left right clock for the ADC side of the codec.

    On SW2:

    DSDATA1-4, This is the serial data going to the DACs. This codec has 8 channels so the 1772 only has one of these SDATA lines since it only had two DACs.

    DBCLK, This is the bit clock connection to the DAC side of the codec

    DLRCLK, This is the Left Right clock connection to the DAC side of the codec.

    Note, that the codec used on this evaluation board can operate the ADCs and the DACs on two different clocks. The 1772 only needs one set of BCLK and LRCLK to operate both the ADC and DAC serial ports.

    I was looking at Sheet 4 of the EZ-Board schematics and it is page 90 of the PDF that I have on my computer. This is the ADSP-21489 EZ-BoardTM Evaluation System Manual.

    I hope this helps.

    Thanks,

    Dave T

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