during my work o ADAU1979 i have some odds and some questions about some ambiguity and less-information stuffs.
1. when i work with SPI of ADAU1979, I found that i should provide SCLK regardless of CS active. since my cortex M3 controller gives out SCLK only when CS is active, i had to bring some tricks on. anyway, this is not an issue anymore, but is this behavior what the SPI of this chip is designed?
2. i had to use AD628 just before the 1979. because i need some attennuation on audio signal. but AD628 gives out single ended output. because i don't want to use coupling capacitor, i got the vref of 1979 and through a voltage follower
and i feed this to each AD628's Vref input and 1979's each inverting inputs.with this, ADC's input common mode Vtg gap is minimal.
-2.1 on ADAU1979 datasheet, page 14, i read this clause
"In most audio applications, the dc content of the signal is removed by using a coupling capacitor. However, the ADAU1979 consists of a unique input structure that allows ac coupling of the input signals. The typical input resistance is approximately 32 kΩ from each input to AGNDx."
removing DC contents of the signal using cap coupling is the AC coupling. right? what does this mean exactly?
i understood this device is capable of dc coupling. i don't know exactly how ( for there is no explanation, no data)
but decided to trust it' is possible. i did the vref vtg follower thing though. because it is what i shoud do at least.
2-2 controlregister 'HIGH-PASS FILTER AND DC OFFSET CONTROL REGISTER AND MASTER MUTE REGISTER'
at address 0x0E, bit0 DC_CAL.
do i have to this bit on? or do i have to DC calibration from time to time? does this have impact on ADC's channel output data?
2-3 controlregister 'DIGITAL DC HIGH-PASS FILTER AND CALIBRATION REGISTER'
at address 0x1A,
if i set this byte to 0, ADC's vref output does not showing 1.5V, adc output TDM stops working (logic 1 all the time..)
what is this register for?
2-3 if i raised AD628's output by 1.5v by feeding 1979's vref value to Vref pin of AD628, and feed vref back to 1979's inverting input, this situation is identical to ac coupling using coupling cap. what happens in this case, if i set the bit DC_SUBCx to 1 and let the chip subtract DC calibration from channel converted value? I am concerned that this subtract additional 1.5V from right difference value of noninverting pin minus inverting pin.
did i do things right? since i set the bits to 0, the vref is gone and data do not come out of the chip.
what should i do?
ADAU1979's SPI interface is flawlessly working at 4Mhz SPI clock.
i have AUTO_CS of Cortex M3 SPI on, disable Interrupt routine and with manual I/O code, i2c to spi turning codes (3 dummy SPI writes) and all SPI I/O thereafter works perfectly.
i think there was some mistake in register value mangling at first..
and i made hasty decision on ADC's SPI. i think i did not freeze register value first.
the malfunction of ADC behavior should caused from transition to and from interrupt SPI code and manual SPI code of cortex.
sorry for any inconviniences and efforts that ADI people may take, doing any checkup activities.
i still do not clearly understand the ADC's analog input interface,
my original criteria is to combine DC coupled case and single end input case that was on fig.19 in page 15 of ADAU1979 datasheet.
because i had to use AD628 before ADC which gives out single ended output and wanted to eliminate coupling capacitor in ADAU1979's input pins, i made a voltage follower with ada4610 which takes VERF vtg of ADAU1979 as input, and feed this cm voltage to AD628's verf pin and 1979's inverting input.
and this is working perfectly (until now..)
audio signal is through ADAU1979 - FPGA - ADAU1962A all ADC and DAC is working as intended. and ADCed, DACed audio sounds nice.