I2S different LRLCK/BCLK

Hello,

I using the DSP ADAU1701, and I have the following questions:

1. Using the I2S input interface, if I reproduce an audio file with a sample rate of 96kHz/24 bit stereo, the LRCLK of audio source is 96kHz, the DSP is set to 48kHz, is there a missmatching? And viceversa if the DSP is set to 96kHz and I reproduce an audio file with a sample rate of 44.1kHz/16bit stereo?

2. Using the I2S input interface, if I have two different audio sources with two different LRCLK/BCLK, how I can manage this issue? I would like to connect the audio sources on SDATA IN0 and SDATA IN1

Thank you in advanced

Fabrizio

  • Hello Fabrizio,

    First let's start with 96kHz audio data and serial port LRCLK rate. If you send this to the DSP with the DSP set to 48kHz fs, then what happens is that one sample is clocked into the serial port shift register then is clocked into the buffer so the core can pick it up. However, then the next sample is shifted into the serial port shift register and then is clocked into the serial port buffer replacing the last sample before the core has had a chance to pick it up and so it is lost. Then the DSP will clock in the second sample into the core. So you lose every other sample.

    This results in distortion and aliasing since some of the audio data is above the nyquist for 48kHz fs.  

    Next, the case where the serial data is running at 48kHz, and has 48kHz sampled audio contained in the data, and the DSP is running at 96kHz.

    This time the shift register is still shifting in the data and has not transferred it into the buffer so the DSP will pick up the contents of the buffer, this will contain the pervious sample. Then on the next sample period the serial port will complete the shifting of the sample and transfer it to the buffer. then the DSP will pick up the sample.

    So the next sample period again the serial port will not finish and will not update the buffer and so the same sample gets repeated. So the core gets two identical samples then two more etc. This is a staircase waveform and will produce lots of harmonics and so the THD will be high.

    Now for your third case. Reading 44.1kHz data in at 48kHz. So the samples will be played back at a higher rate. So the pitch will be different and the length of time to play the file is different. Again, this is usually not desirable.

    What you need is a sample rate converter. With an ASRC (Asynchronous Sample Rate Converter) you can bring in almost any sample rate (up to an 8:1 difference) and convert it to the core rate or convert the core rate to the serial port rate. For this to work you will either need a codec with built in ASRC like the ADAU1372 or you need to change to a larger DSP like the ADAU1452 which has built in ASRCs. I know nothing of what your application is so I cannot say which is best.

    Dave T

  • Hello Dave,

    thank for your support

    Regards

    Fabrizio

  • Hello Dave,

    could you send me (please) a dspproj sample to testing:

    - Input signal I2S from SDATA_IN3

    - Input signal I2S from SDATA_IN2

    - Both signals is mixed on analog output OUT1

    - Between them I need the ASRCs for both SDATA_INx

    - I would use the DSP fs core sampling rate (on board MCLK) at 96kHz

    - Like control I use two gain level bars (one for each input) to start for the test/learning

    1. From external I2S signals inputs, I connect also BCLK and LRCLK signals for both I2S inputs? 

    2. From SDATAIN2 the sample rate is fixed at 48kHz, on the contrary from SDATAIN3 the sample rate is not fixed, change from 44.1kHz to 192kHz based on music file sample rate is playing. You see some problems?

    Thank you!

    Fabrizio

  • Hello Fabrizio,

    1) Are you switching from the ADAU1701 to the ADAU1452? You will need to unless you use the ADAU1372 codec.

    2) Are you using the ADAU1452 evaluation board?

    Dave T

  • Hello Dave,

    sorry I missed to say you that I changed to ADAU1452 development board (MINIZ)

    Regards