Characterisation data in Rev. 0 of the ADAU1787 datasheet ends at about 22kHz.
Does the AD1787 support signal BW's of 48 kHz or 96 kHz and higher, and if so, is characterisation data available to support this?
The specifications are given in the standard audio band so that is why they do not go above 22Khz. The filters will all adjust with the sample rate so the bandwidth will increase with higher sample rates. However, we only guarantee the performance in the audio band. We did not characterize above the audio band that is available with the higher sample rates.
Thank you Dave. Can you confirm the max. signal BW supported by the ADAU1787 on a digital port, please? The datasheet refers to both LRCLK and FSYNC. Are these identical? Is the max signal BW therefore 0.4286 x 192 kHz = 82.3 kHz (typ), or are higher bandwidths perhaps supported on a digital port?
The LRCLK and FSYNC (Frame Sync) do refer to the same thing. The sample rate clock. There are competing "standards" as to what they are referred to due to the serial format. With I2S it is a stereo format and the left channel data is when the LRCLK is low and the right channel is when the LRCLK is high. (unless inverted in register settings). When you use TDM where there is more than one channel then the term LRCLK has no meaning so Frame Sync is used to denote the sample rate clock. Plus often with TDM the clock is not a 50/50% duty cycle so LRCLK has even less meaning.
Regarding bandwidth. It is tied to the Nyquist frequency of the sampled data. So the bandwidth will be close to the Nyquist frequency of 1/2 fs. There is no way to increase this bandwidth.
Now if the incoming data was sampled at a higher rate then you can process this on the fastcore but the problem is with the serial port. It can only operate up to the stated max in the datasheet. You can possibly trick the part into operating at a higher rate. I know we have done this on the 1452 family of parts. We have used TDM4 running at 192kHz fs to capture four samples of audio. The four samples are actually two consecutive samples that were sampled at 384kHz fs and were packed into a TDM4 stream at 192kHz fs. Then the DSP core unpacked the data and was running at 384 kHs fs rate. In the case of this part I am not certain if it is capable to doing this. This is a new part and we have not had the chance to experiment with it for these kind of tricks.
The 1787 is not my part to fully support and the Apps engineer on this part will see this post and respond. I am pretty sure he has not tried this out and I don't think he is aware of our experimentation with the 1452 running at 384 kHz fs. They were done in the automotive department. However, you have brought up a very good question that deserves looking into further.
Is this what you are trying to do?
If you stay in the part you can certainly operate at higher rates and therefore higher bandwidths but in reading your posts you want to be able to transmit and or receive high rate data over the serial ports.
So right now all I can say is that it may be possible but it will require some investigation and testing.
Yes, considering the upper limit on FSYNC of 192 kHz, this is exactly what we're after - packed 384 kHz TDM4 @ 192 kHz or even packed 768 kHz TDM8 at 192 kHz (?). It would be great if you could confirm that this is possible. Do you expect dynamic range performance to suffer in this case?
Packed TDM4, if available, should be possible for all four input channels on the ADAU1787, correct?
4 x (16 x 2) x 192 kHz = 24.576 MHz.
Any news on how this would be implemented on this device?