AD73322L datasheet:
Word growth in the decimator is determined by the sampling
rate. At 64 kHz sampling, where the oversampling ratio (OSR)
between sigma-delta modulator and decimator output equals
32, there are five bits per stage of the three-stage Sinc3 filter.
Due to symmetry within the sigma-delta modulator, the LSB
is always a zero; therefore, the 16-bit ADC output word has
2 LSBs equal to zero, one due to the sigma-delta symmetry and
the other being a padding zero to make up the 16-bit word.
I do not understand "symmetry within the sigma-delta modulator".
Thanks!
Xuelei