Q
What is the temp drift of the internal PGA?
A
This product has been released for a very long time so it is hard to get information on it that is not in the datasheet. The PGA temperature drift…
Q
I have some doubts over the timing of AD73360. In the datasheet, there is some
description for SDOFS:(see figure1).Here it is mentioned that the period of
SDOFS pulses would be 1/fsample, just…
Q
What is the frequency response of AD73360 over different sample rates?
A
I have attached a spreadsheet for calculating the response based on sample
rate.
By selecting a sample rate…
Q
Please can you clarify the layout requirements for one of your parts? I cannot
resolve the various requirements.
The part in question is the AD73360 Analog Front End, and the question concerns…
Q
Is there a lower limit to the frequency of the MCLK input?
A
There is no lower limit to the MCLK as long as it’s reasonable i.e. not in Hz
etc.
All the digital filters should scale with…
Q
I am using the DC coupled configuration in which VINN is shorted to VREFOUT of
1.25V and the input voltage is applied to VINPX (Fig. 27). What is the voltage
range on VINPX and LSB value in…
Q
The period of SDOFS pulses would be 1/fsample, just like Figure 10a. My
question is for Figure 10b and 10c, what’s the period of SDOFS pulses?
A
The 1/f is when the sample is valid. The start…
Q
What is the setting amplification factor time from 0 dB to 38 dB, if chip work
with 3.3 volt?
A
The PGA is implemented by changing the sampling of the input signal, this is a
common PGA…
Q
I have a question about the AD73360 DC performance. I can't stabilise it's DC.
DC is changed and I can't calibrate it
I could get signal in 15 bit resolution without noise but the changing…
Q
We use in our application, which we develop, your AD73360L six input A/D
converter. Programming them, in some certains cases we have a problem, concrete
sometime the reference will not power…