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Fail to use ICE-2000 in CCES 2.11.0 for ADuCM4050

Category: Hardware
Product Number:

After 3 years of proper work with the ICE-2000 on a custom circuit with the ADuCM4050, came a period of several weeks in which the ICE-2000 connectivity becomes more and more difficult (=it did not work many times) and then it completely stopped functioning.

Exchanging the physical circuit, the cable between the ICE and the circuit, the ICE itself and the USB cables did not help, so I'm quite sure it is a software problem and not an hardware one.

In CCES 2.10.0 I got an error that "device actively refused connection", so I migrated my project to CCES 2.11.0 where I get the following message:

Open On-Chip Debugger (Analog Devices CCES 2.11.0) OpenOCD 0.10.0-gd1ba667 (2022-04-13-15:59)
Licensed under GNU GPL v2
Report bugs to <>
Info : only one transport option; autoselect 'jtag'
adapter speed: 1000 kHz

Error: Can't change session's transport after the initial selection was made
C:/Analog Devices/CrossCore Embedded Studio 2.11.0/ARM/packs/AnalogDevices/ADuCM4x50_DFP/4.0.0/openocd/scripts//target/aducm4x50.tcl:16: Error:
in procedure 'script'
at file "embedded:startup.tcl", line 26
at file "C:/Analog Devices/CrossCore Embedded Studio 2.11.0/ARM/packs/AnalogDevices/ADuCM4x50_DFP/4.0.0/openocd/scripts/target/aducm4050.cfg", line 8
at file "C:/Analog Devices/CrossCore Embedded Studio 2.11.0/ARM/packs/AnalogDevices/ADuCM4x50_DFP/4.0.0/openocd/scripts//target/aducm4x50.tcl", line 16

I saw a similar problem in the EngineerZone but it did not help me...

I'm using:

Edition Windows 10 Pro
Version 21H2
Installed on ‎01/‎10/‎2020
OS build 19044.1826
Experience Windows Feature Experience Pack 120.2212.4180.0

What can I do to solve it?


Top Replies

    •  Analog Employees 
    Sep 15, 2022 +1 suggested

    Hi   -

    The issue here is that CCES 2.11.x ships with a later version of OpenOCD yet the CMSIS-Pack for ADuCM4050 has not been updated. More specifically, the TCL script has not been updated.

    To work around…

  • Hi   -

    The issue here is that CCES 2.11.x ships with a later version of OpenOCD yet the CMSIS-Pack for ADuCM4050 has not been updated. More specifically, the TCL script has not been updated.

    To work around the problem, please Edit C:/Analog Devices/CrossCore Embedded Studio 2.11.0/ARM/packs/AnalogDevices/ADuCM4x50_DFP/4.0.0/openocd/scripts//target/aducm4x50.tcl and change:

    swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
    target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME

    to be

    swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
    dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
    target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap

  • Hi amcl,

    It did not help. I get exactly the same log/error as I got before because it stops due to error in line 16 in aducm4x50.tcl, and never executes line 52 in which the new commands were injected.

    I added the content of my updated tcl file below.



    # Common file for Analog Devices ADuCM4x50
    # minimal dap memaccess values for adapter frequencies
    #   1 MHz:  6
    #   2 MHz:  8
    #   5 MHz: 18
    #   9 MHz: 27
    #  15 MHz: 43
    #  23 MHz: 74
    # hardware has 6 breakpoints, 1 watchpoints
    # ADuCM4x50 devices support only SWD transport.
    transport select swd
    source [find target/swj-dp.tcl]
    source [find bitsbytes.tcl]
    source [find memory.tcl]
    source [find mem_helper.tcl]
    if { [info exists CHIPNAME] } {
    } else {
       set _CHIPNAME aducm4x50
    if { [info exists CHIPID] } {
       set _CHIPID $CHIPID
    } else {
       puts stderr "Error: CHIPID is not defined"
       shutdown error
    if { [info exists ENDIAN] } {
       set _ENDIAN $ENDIAN
    } else {
       set _ENDIAN little
    adapter_khz 1000
    if { [info exists CPUTAPID] } {
    } else {
       set _CPUTAPID 0x6ba02477
    swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
    dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
    target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
    if { [info exists WORKAREASIZE] } {
    } else {
       # default to 8K working area
       set _WORKAREASIZE 0x2000
    $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
    $_TARGETNAME configure -event reset-init {
       # disable watchdog, which will fire in about 32 second after reset.
       mwh 0x40002c08 0x0
       # A previously executed program might have increased processor frequency.
       # It would have also increased WAITSTATES in FLCC_TIME_PARAM1 for the
       # increased processor frequency. After reset, processor frequency comes back
       # to the reset value, but WAITSTATES in FLCC_TIME_PARAM1 does not, which
       # will cause flash programming error. So we need to set it to the reset
       # value 0 manually.
       set time_param1 0x40018038
       set key         0x40018020
       set user_key    0x676c7565
       set data [memread32 $time_param1]
       mww $key $user_key
       mww $time_param1 [expr {$data & 0xf}]
       mww $key 0
       set data [memread32 $time_param1]
       set retry 0
       while { [expr {$data & 0x700}] != 0 } {
          set data [memread32 $time_param1]
          set retry [expr {$retry + 1}]
          if { $retry > 10 } break;
       if { $retry > 10 } {
          set msg [format 0x%08x $data]
          puts stderr "Error: failed to reset WAITSTATES in flash controller TIME_PARAM1 register"
       # After reset LR is 0xffffffff. There will be an error when GDB tries to
       # read from that address.
       reg lr 0
    $_TARGETNAME configure -event examine-end {
       global _CHIPNAME
       global _CHIPID
       # read ADIID
       set sys_adiid 0x40002020
       set adiid [memread16 $sys_adiid]
       # read CHIPID
       set sys_chipid 0x40002024
       set chipid [memread16 $sys_chipid]
       if { $adiid != 0x4144 } {
          puts stderr "Error: not an Analog Devices Cortex-M based part"
          shutdown error
       puts [format "Info : CHIPID 0x%04x" $chipid]
       if { [expr { $chipid & 0xfff0 } ] != $_CHIPID } {
          puts stderr "Error: not $_CHIPNAME part"
          shutdown error
    $_TARGETNAME configure -event gdb-attach {
       reset init 
       arm semihosting enable
    $_TARGETNAME configure -event gdb-flash-erase-start {
       reset init
       mww 0x40018054 0x1
    $_TARGETNAME configure -event gdb-flash-write-end {
       # get the reset handler address from application's vector table
       set reset_handler [memread32 4]
       reset init
       # run kernel and stop at the first instruction of application reset handler
       bp $reset_handler 2 hw
       rbp $reset_handler
    set _FLASHNAME $_CHIPNAME.flash
    if { [info exists FLASHSIZE] } {
    } else {
       # ADuCM4x50 has 512KB flash, but the top two pages (4KB) are reserved
       # for use as a Protected Key Storage region
       set _FLASHSIZE 0x7f000
    flash bank $_FLASHNAME aducm4x50 0 $_FLASHSIZE 0 0 $_TARGETNAME
    if {![using_hla]} {
       # if srst is not fitted use SYSRESETREQ to
       # perform a soft reset
       cortex_m reset_config sysresetreq