ADuCM350 SDK v2.3.0.0 now available

The latest version of the ADuCM350 Software Development Kit, v2.3.0.0, is now available to download. The download is available here (registration required). The changes in SDK v2.3.0.0 are as follows (as per the ADuCM350BBCZ Device Drivers Release Notes):

Maintenance release, including fixes/features:

• USB/RTOS
  • Added support for the USB Communications Device Class (CDC) with accompanying example.
  • Updated support for Micrium’s latest uC/OS-II release (4.04.01).
  • Updated to the latest USB driver from ADI, featuring the following improvements:
    • USB host and device modes are integrated
    • DMA mode 1 is fully functional
    • Improved throughput
  • Removed obsolete bsp directory and files and revised examples to build without them.
• Removed deprecated dynamic GPIO pin multiplexing APIs from the GPIO service.  A static pin multiplexing GUI is now used to reduce target code footprint and code complexity.  (See “Static Pin Multiplexing” in “ADuCM350BBCZ Software Users Guide” for details.)
• Removed “TEST_COMMON_USES_UART” STDIO redirection macro.  Any UART output must be be managed at the application level -- after first configuring the UART pins as required as part of static pin mux configuration process (See “PinMuxUI” in the “tools” directory of this release).  UART output has been added at application level for Analog Front End (AFE) based examples to facilitate returning results from the ADC.
• SPI Device Driver
  • Added support for designating any GPIO pin for use as SPI chip select.
  • Added DMA data chunking to schedule large data transactions into a chain of smaller DMA descriptor blocks, as needed.  The DMA “ping-pong” cycle type is used to automatically switch/update descriptors.  This is entirely within the SPI driver and transparent to the user.
  • Enforced DMA mode size checking of the “DataSize” member in the ADI_SPI_TRANSCEIVE_TYPE structure (used by both adi_SPI_MasterTransfer() and adi_SPI_SlaveTransfer() APIs) to insure evenly-size counts and buffer allocations for DMA transactions.  The 8-bit byte count must be evenly-sized because underlying SPI controller employs only 16-bit DMA mode.
  • Added DMA error handlers to the SPI examples to intercept “invalid” DMA descriptor interrupts resulting from the intentional use of invalid DMA cycle type to mark the end of a multiple DMA descriptor chain.  Such errors are allowed by the handler while other DMA errors are trapped (bus errors, etc.)
• Examples removed:
  • SpiMasterSlaveTest example removed. If this example is required, please contact ADI. See Support section.
  • Mipi_SSD1963_Test example removed due to hardware supply issue.