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AD5940 - Sequencer doesn't start intermittently

I'm having difficulty reliably triggering the sequencer.  Roughly once in every 10,000 measurements the sequence fails to run.

I'm triggering with:

AD5940_SEQMmrTrig(0);
while(!AD5940_GetMCUIntFlag())
{
// sleep
}
AD5940_ClrMCUIntFlag();
if(AD5940_INTCTestFlag(AFEINTC_0, AFEINTSRC_DATAFIFOTHRESH) == bTRUE)
{
// do stuff
} else

// error
}

I'm using AD5940_SEQGpioCtrlS(AGPIO_Pin2); at the top of the sequence and AD5940_SEQGpioCtrlS(0); at the end to indicate activity; MCUInt is triggered by the negative edge.


Is there a way I can see over SPI that a sequence is in progress?

Is there any form of error response if an SPI transaction fails?

Thanks
- Eric VanWyk
Parents
  • Hi,

    Have you monitored the GP2 pin to ensure that the sequence execution is completed each time before it is triggered again?

  • I'm relatively confident that the previous sequence has finished before kicking off the next one: I've verified with a scope+analyzer that the SPI command to trigger the next sequence is never issued while GP2 indicates a running sequence.

    Is there another way to determine whether the sequencer is actively running?

  • Hi,

    The trigger for next sequence will occur only after GP2 becomes low.

    Could you share the GP2 waveoform?

  • Good news!

    Chip Select was very occasionally sending pulses that were too short.  Datasheet asks for 80ns, occasionally it was getting 24ns.

    On line 946 of AD5940.c there is a comment that reads
    /* Add delay here to meet the SPI timing. */

    Adding the delay there made it meet timing, but this was a bit confusing.  This comment is deep within a file that is largely not edited by end customers; per lines 4905-4926 of AD5940.h we provide function bodies for things like AD5940_ReadWriteNBytes and AD5940_Delay10us so that we don't have to edit AD5940.c

    It would be helpful if that was documented more clearly and in the same place as the other function bodies.  Maybe as AD5940_Delay80ns?  Maybe as a comment on either CsClr or CsSet that indicates that function needs to delay or wait at least 80ns?  

Reply
  • Good news!

    Chip Select was very occasionally sending pulses that were too short.  Datasheet asks for 80ns, occasionally it was getting 24ns.

    On line 946 of AD5940.c there is a comment that reads
    /* Add delay here to meet the SPI timing. */

    Adding the delay there made it meet timing, but this was a bit confusing.  This comment is deep within a file that is largely not edited by end customers; per lines 4905-4926 of AD5940.h we provide function bodies for things like AD5940_ReadWriteNBytes and AD5940_Delay10us so that we don't have to edit AD5940.c

    It would be helpful if that was documented more clearly and in the same place as the other function bodies.  Maybe as AD5940_Delay80ns?  Maybe as a comment on either CsClr or CsSet that indicates that function needs to delay or wait at least 80ns?  

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