amperometric

I'd like to modify the sequencer code in AmperometricMeasurement.c to leave the DAC running at its VL2 value forever.  I understand that it's possible to comment out the 2nd to last line of the sequence to make the AFE sample forever, but the DAC doesn't stay at its VL2 level.  I also tried deleting the wait statement (in the 3rd to last line of the sequence, see attached), but that had no effect, the DAC output is still eventually brought low.  How does one modify the sequence to have the DAC be set to VL2 forever?

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  • Hi Neo,

        After playing around and doing lots of experiments (including grounding my battery-powered board to the aluminum plate it's mounted on, unplugging my laptop from wall power so that it also runs from batteries, and comparing the SPisolated vs non-SPIsolated versions of my custom ADuCM350 setups), it's pretty clear that the SPIH bus is getting into my AFE signal.  I think it gets into the AFE signal in several ways.  First, I think this SPIH interference couples into VCCM_ANA (and then into the AFE signal), in two ways:  1)  I suspect that the surge in current yanks my power supply down every time the SPIH bus sends, or stops sending, a buffer, and 2)  even though I thought I was careful in my layout, I did screw up and run my SPIH signals over my VCCM_ANA power plane.  

    Actually, maybe the SPIH interference also couples into my VBIAS (I used VBIAS to do active shielding on my 4 AFE traces and perhaps that wasn't a good idea).

    Finally, maybe SPIH garbage radiates over to my AFE because I have such a high impedance node at TIA_I (?).  My load that I'm measuring is a 4 Mohm resistor, across which I'm applying a 300 mV step.  And for R_TIA, I'm also using 4 Mohms,  I'm looking for ~10pA current resolution.

    I'm going to re-spin this board.  Do you (or an ADI expert on LDOs) have a recommendation you can give me for a stiffer regulator?  Or any other suggestions?  Details attached.

    Thanks.

    161213_PowerSupply_corruption_question.pdf
Reply
  • Hi Neo,

        After playing around and doing lots of experiments (including grounding my battery-powered board to the aluminum plate it's mounted on, unplugging my laptop from wall power so that it also runs from batteries, and comparing the SPisolated vs non-SPIsolated versions of my custom ADuCM350 setups), it's pretty clear that the SPIH bus is getting into my AFE signal.  I think it gets into the AFE signal in several ways.  First, I think this SPIH interference couples into VCCM_ANA (and then into the AFE signal), in two ways:  1)  I suspect that the surge in current yanks my power supply down every time the SPIH bus sends, or stops sending, a buffer, and 2)  even though I thought I was careful in my layout, I did screw up and run my SPIH signals over my VCCM_ANA power plane.  

    Actually, maybe the SPIH interference also couples into my VBIAS (I used VBIAS to do active shielding on my 4 AFE traces and perhaps that wasn't a good idea).

    Finally, maybe SPIH garbage radiates over to my AFE because I have such a high impedance node at TIA_I (?).  My load that I'm measuring is a 4 Mohm resistor, across which I'm applying a 300 mV step.  And for R_TIA, I'm also using 4 Mohms,  I'm looking for ~10pA current resolution.

    I'm going to re-spin this board.  Do you (or an ADI expert on LDOs) have a recommendation you can give me for a stiffer regulator?  Or any other suggestions?  Details attached.

    Thanks.

    161213_PowerSupply_corruption_question.pdf
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