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ADuC7124 (eval board): UART problem / GP1CON

Hi,

I'm trying to use the ADuC7124 UART from the pin headers on the eval board (J1). I set up P1 as follows:

GP1CON = 0x02220011;
GP1DAT = 0x8C0C0000;

On the same port I also use SPI for another peripheral - this works perfectly.

I'm using an FTDI TTL-232R-3V3 USB to UART converter with 3.3V logic, and have connected them accordingly. My problem is that when the FTDI is connected at the pin header, and I tx data from the PC, the observed voltage level on J1 is only 1.25Vpp. If I disconnect the cable and measure at the connector to the cable going to the PC, the voltage levels are again 3.3Vpp as they should be.

The drive strength of the FTDI converter is already at 12 mA. Reducing it to 4 mA using their FT-Prog program, the voltage levels observed when connected at J1 is about 600 mVpp.

What could possibly affect this?
VDDIO is not connected to the FTDI converter as it is powered by USB power. DGND however, IS connected.
My immediate thought was that GP1CON was actually not set, but it is!

Thanks for any hints.

Kind regards,
Troels



Grammar
[edited by: tk-don at 4:51 PM (GMT -5) on 24 Nov 2021]
Parents Reply
  • Hi Karl,

    Thank you for your reply.
    I tried setting GP1CON = 0x00000011, but it made no difference unfortunately.

    What I tried next was to try out UART1 instead on P4.0 and P4.1 and reconfigure the setup to use the registers associated with UART1 (COM1....). It works perfectly, and interrupts work fine as well, when reconfigured for UART1.

    We changed the ADuC7124 just for good measures, but a new one behaved the same. Then we noticed the vias connecting the FT2232H IC on the eval board to UART0. We decided to disconnect the FTDI FT2232H by cutting and jumping traces. Now the UART0 works perfectly.

    I guess I should have checked the schematics on the CD that was delivered with the eval board. The schematics online  https://www.analog.com/media/en/technical-documentation/evaluation-documentation/ADuC7124_A1.pdf is missing page 2, and thus one would never guess it is connected elsewhere than J1 and J2 (pin headers).

    By the way, we're migrating from ADuC7024.

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