ADuC7126 serial download problem

We have several boards using the  ADuC7126 (Uart downlod) and the ARMWSD program indicates (always) verification error.

The oscilloscope (AC) shows a pulse of 700useg on the LVDD pin, about 120mv. This signal indicates a problem with the part or a problem with the bords layout?



  • 0
    •  Analog Employees 
    on Sep 1, 2021 5:44 AM

    Hi Daniel,

    The on-chip linear regulator generates the voltage of the LVDD from the IOVDD. The voltage generated should be around 2.6V. You can check the IOVDD if it's pulsing or supplying enough voltage to the device.



  • Hi, Karl

    Thank you very much for your prompt answer. I verified the power supply and the voltage and current capability is ok, w/o noise or pulses on IOVDDx.

    The problem (the same on several parts ) is the voltage applied on IOVDD. Basically the power suply is 3v3, but the CI's tested only program and verify the flash with 2,85 v max, any value above the mentioned reports verify error

    Please, this problem is a defective part or maybe a fake component?

    I used a laboratory power supply and the GND and IOVDD voltage near the AduC.

  • 0
    •  Analog Employees 
    on Sep 10, 2021 4:31 AM in reply to Daaver

    In the ARMWSD, it should be able to detect the component correctly. 

    Have you also checked the voltage at the LVDD pin, when the supply voltage is below 2.85V and above 2.85V?

    You can also try checking the watchdog timer, the verification could fail, if it takes to long to download the program.

  • The ARMWSD detect the ADuC7126 correctly.

    I verified the voltage on LVDD with several values of IOVDD.

    First LVDD value is normal mode, the second one (LVDD prog) is programming mode enabled.

    IOVDD=3.3 vdc  LVDD: 2.61 vdc     LVDD prog: 2.48-2.49 vdc program error

    IOVDD=3.0 vdc  LVDD: 2.61 vdc     LVDD prog: 2.54 vdc program error

    IOVDD-2.95 vdc LVDD: 2.60           LVDD prog: 2.56 vdc program error

    IOVDD=2.90 vdc LVDD: 2.60          LVDD prog: 2.57 vdc program error

    IOVDD=2.85 vdc LVDD=2.60          LVDD prog= 2.60 vdc program ok

    Pulse on LVDD of 100mv and decresing with IOVDD between 3.3 vdc and 2.90 vdc 

    No pulse with IOVDD of 2.85 vdc

    Pleas, clarify the watch dog timer problem, I didn´t understand the point.


  • 0
    •  Analog Employees 
    on Sep 14, 2021 8:02 AM in reply to Daaver

    The LVDD is the supply to the core logic which requires 2.6V.

    Is there an external compensation capacitor across the LVDD pin and ground? It is recommended to connect a capacitor of 0.47µF as close as possible to these pins as shown below..

    It is also recommended to use excellent power supply decoupling on IOVDD. This helps improve the line regulation performance which is generating the 2.6V for the core logic.

    I was thinking the verification could fail if the checksum is not received by the WSD in time, so we can try monitoring the watchdog timer. However the problems seems to be more on the supply voltage to the core logic.