Why do i said engineer of ADI give wrong conclusion?

I post a thread for help to validate bug of ADUC7061.

But engineer of ADI give out test code and test result, then he cosider that bug is not true basing his test result.

But i realy regard his test result do admite that the bug is existing.

Ok, i will provide my proll.

firstly, i assume engineer of ADI could operate or express wrongly, but is don't matter. we try to fix it.

I give out code here first:

From the code ,we can find ulADC1Result follows:

DACDAT = 0x0000000;
DelayMs(10);

the sample rate is 1kHz, and DelayMs(10) exceeds 10milli-seconds. So value of ulADC1Result will be constant, not swinging from 0 to 0.5945V.

This picture is provided by ADI, you will find the result is 0.5945V.

 

Secondly, 

When using ADC1 to sample ouput of DAC, the result is very precise, around 0.1%.

If the output is 0.6V, the error is about/around 1%, It is not possible.

So i assume test result of 0.594V is an coincidence.

I will give my result:

You can see that the output of ADC1 is 0.600V, precise 0.600V.

When I want DAC to output 0.9V, DACDATA =0xc000000, the oupt of ADC1 is 0.899V

So I assume, engineer of ADI provide fake proof, poerhps, the test result just support the conclusion: DAC works incorrectly when p0 is configured as ADC input.

Top Replies

  • +1
    •  Analog Employees 
    on Apr 23, 2021 5:44 AM

    Hi,

    Linking the original EZone thread here. (+) ADC problem about ADUC7061 - Q&A - ARM7 Core Products - EngineerZone (analog.com)

    Please let me clarify the setup for my test:

    1. The board I used is the EVAL-ADUC7061MKZ so I can only download via UART downloader

    2. The example code that I provided configures the Primary and Auxiliary ADCs to use ADC2 and ADC8 as inputs respectively. I am using an external voltage source as an input to ADCs. No ADC is connected to any DAC, this is the reason why my result is showing a constant value even when DAC value is change. If I change the value in the voltage source then thats the time that the ADC result will change. 

    3. The DAC is configured to output zeroscale (0V) and midscale (0.6V) in a given time interval using VRef = 1.2V

    In conclusion, all the blocks are working fine even with P0 configured as an analog input. ADC8 is shared with P0.2 for ADUC7061 part and the DAC is still working as expected no spikes as reported in the original thread. 

    I will advise you to get the EVAL-ADUC7061MKZ and do your tests with this board. I am also open to reviewing your schematic and layout to see if there's anything that is causing the issue on your side. 

    regards,

    Mark

  • I do belive your C code is according to your test result.

    The result do validate the output of DAC is wrong.

    The problem is that you understand the value and code logic incorrectly.

    Will you indtruduce another engineer of ADI to talk about this? such as MMA?

    you should understand this law carefully.

    Which DACDATA ration will be equal 1.0 / 0.5945?

    And, I said again, if the device is correct, the output should not be 0.5945, it should be precise 0.6.

    In my board, it does really ouput 0.6.

    So you give conclusion not seriously !!!!

    You code is consistent to your test resuld. but you can't understand the realation between them.

    You are in the plight of thinking now.