ADuC7024 ADC - Misc questions

Hi,


I have a few questions regarding the behaviour of the ADC peripheral on the ADuC7024 that I hope can be commented on:


i) After an ADC conversion has completed (ADCReady = 1) are the contents of bits 0 to 15 in ADCDAT all 0 or other/undefined?


ii) Data sheet Rev C, P44 says that reading ADCDAT clears ADCReady (ADCSTA, Bit 0). Does this also clear the ADC Channel (bit 7) in IRQSIG?


iii) With ADCCON configured for conversion on Timer 1 (bits 2:0 = 001) is it acceptable to read ADCDAT after a previous conversion has been performed (ADCReady = 0) and while a new conversion is in progress (ADCBUSY = 1)? I want to avoid the possibility of reading a value that is neither the result of the previous, or current conversion, such as when the result is being transferred internally to ADCDAT?


iv) What happens if ADCCON is written to/changed, while an ADC conversion is in progress (ADCBusy = 1) - does it affect the conversion in progress?


v) What happens if ADC channel is changed (ADCCP) while an ADC conversion is in progress (ADCBusy = 1) - does it affect the conversion in progress?


Thanks.

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  • 0
    •  Analog Employees 
    on Mar 16, 2011 9:23 PM

    1) Unfortunately, we can't guarantee that ADCDAT[15:0] will always be 0x0000 - you will need to mask these bits.

    2) An example here may work better.

    If you have an external interrupt enabled and you pulse the interrupt pin, the IRQSIG bit associated with the external interrupt will stay =1 as long as the interrupt level is asserted - as soon as the pin is de-asserted, this bit in IRQSIG will clear to 0.

    However, the same bit in IRQSTA will stay set until the IRQSTA register is read in the IRQ handler routine - even after the pin has de-asserted.

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  • 0
    •  Analog Employees 
    on Mar 16, 2011 9:23 PM

    1) Unfortunately, we can't guarantee that ADCDAT[15:0] will always be 0x0000 - you will need to mask these bits.

    2) An example here may work better.

    If you have an external interrupt enabled and you pulse the interrupt pin, the IRQSIG bit associated with the external interrupt will stay =1 as long as the interrupt level is asserted - as soon as the pin is de-asserted, this bit in IRQSIG will clear to 0.

    However, the same bit in IRQSTA will stay set until the IRQSTA register is read in the IRQ handler routine - even after the pin has de-asserted.

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