The ADuC7129 muxes three JTAG pins, /TRST, TDI, and TDO, with GPIO functionality on port 0. The datasheet says that these are configured by default for GPIO functionality (GPxCON Register table and table 70), but wouldn't that prevent a JTAG connection? The datasheet is also not clear on how to configure p0.1 and p0.2 for jtag functionality. Should they be set for mode 01 for JTAG functionality like /TRST? That mode is blank in table 70 for p0.1 and p0.2.