I have a problem with the modification of the DAC output. In normal mode the DAC output from DACDAT is clocked out by the core clock, this works perfect. But if I try to use the mode where the DAC output is triggered by the Timer 1 overflow DACCON bit 5 (DACCLK) set I do not see any output on the pin. What I'm doing wrong. I get the Timer1 IRQ and preload the DACDAT MMR correctly. In normal mode I see the correct output voltage, but the signal has a IRQ latency related jitter on the signal, which I want to avoid with this trigger from the HW Timer1. What can be the possible problem?
Thanks for high-lighting this, basically this is a typing error in the ADuC706x data sheet and need to be changed with the next revision.
The timer to be used for this feature is Timer0.
For a easy test I attached a example project.