ADuC7026 XMxPAR[15] behavior

Hi All,

According to datasheet(revF), setting XMxPAR[15] allows byte write capability without using BHE and BLE for two 8 bit memory sharing the same memory region.

Now, I have following question about this behavior.

When set XMxPAR as 0xF0FF and write data to two 8bit external memories,

  1. how about detail of connections between ADuC7026 and external memories?
    Could you give me a schematics explaining it?
  2. what is the correct timing of output signals from A0:A15 and WS?
  3. what is the correct timing of writing to two memories?

Thanks for your help.

Regards,

TM

  • 0
    •  Analog Employees 
    on Aug 7, 2014 6:22 PM

    Hi,

    i don't have a circuit to replicate 2x 8-bit memories and I can't back up this answer with proven timings but, the following are tentative answers to your questions:

    1) See attached diagram. I have not been able to confirm these connections are correct

    2) See the diagram and also relate to figure 12 of the datasheet

    3) Again, similar to figure 12 except BLE and BHE are always inactive. and the address increments by 1 instead of 2.

    regards,

    Mike

    3169_001.pdf
  • 0
    •  Analog Employees 
    on Aug 8, 2014 12:14 AM

    Hi Mike-san,

    After I read the diagram, I had a only one question.

    In your diagram, the address input pins of external memory are connected to ADDR[0:14].

    I think these should be connected to ADDR[1:15] because ADDR[0] will be incremented by 1 when ADuC7026 writes data to external memories each other, then if ADDR[0] is connected to address input pin, the half of address space in external memories cannot be used.

    Do you agree with me?

    Best Regards,

    TM