ADuC706x: [er007] SPI slave mode: resetting the bit-shift counter

In the Silicon Anomaly document for the ADuC7060/7061, table 4 contains the description of the bitshift counter problem [er007] that may occur when the SPI component is operating in slave mode. The bitshift counter can, according to that document, only be reset by a reset of the ADuC706x.

I have looked again at this problem recently, and found that resetting the bitshift-counter can actually be done by just toggling the serial clock polarity mode bit (SPICPO) in the SPICON register. If the SPICPH bit (clock phase mode) is not set, the SPITFLH bit must also be set when SPICPO is toggled:

Example 1: (SPI mode: CPOL=1 CPHA=1)

  • clear SPICPO
  • set SPICPO again

This should reset the bit shift counter.

Example 2: (SPI mode: CPOL=1 CPHA=0)

  • clear SPICPO, set SPITFLH
  • set SPICPO again, clear SPITFLH

This should reset the bit shift counter.

In my SPI slave firmware, now SPICPO is toggled after each SPI transmission, and it appears to work well.

It would be nice if you could look into this, whether this could be regarded as a workaround to er007.