ADuC841 PWM: random full duty cycle periode

Hello everybody! 

I'm working with the ADuC841's PMW on the "Single Variable Resolution" Mode on pins P3.4 and P3.3 (configured in sfr CFG841) and I'm having an awkward malfunctioning. 

Periodically PWM output presents periods where duty cycle jumps to 100% out of nowhere even when PWM0L and PWM0H presents differents values.

On yellow you can see the PWM output signal inverted. 

I have founded on the "ADuC841 Silicon Anomaly" document that PWM operation presents an issue when RAM Address 0x2E is modified causing the PWM timer to be reset. And the workaround proposed is to obviate that memory address but it didn't work for me. 

Does anyone have had a similar problem? Or does anyone know how solve it?

Thanks.

Best regards,

Federico D. Ceccarelli

  • Hi Federico,


    I haven't encountered anything similar to your problem, but you can zip your code and send it to me. I'll try to look at it if anything in the code is causing the issue.

    What is the blue signal you are measuring?

    Regards,
    Karl

  • Hi Karl, How are you?

    Thanks for your immediate response! 

    Unfortunately software can't be shared because of proprietaries limitations.

    What i can assure is that PWM0L and PWM0H are loaded by a PI controller with an anti blow up limit, so those values are never greater than PWM1 which isn't modified once it is configured. 

    What you are seeing in blue is the Base - Emitter signal from the IGBT controlled with the PWM. It represents perfectly how PWM should be working until the spurious full duty cycle periode. 

    Regards.

    Federico D. Ceccarelli

  • Hi Federico,

    Can you share the register configurations for the PWM?

    Can you check if the part is resetting or if any pins are being reconfigured?

    Regards,

    Karl

  • Hi Karl, 

    My PWM registers configurations are

    CFG841 = 0x50;          // Set PWM on pins P3.3/P3.4
    PWMCON = 0x93           // Enable PWM on Mode 1
    
    // FOSC = 14.7456 MHz, RATED_FREQ = 12000 Hz        
    // PWM1H = FOSC [Hz] / RATED_FREQ [Hz];
    PWM1H = 0x04;
    PWM1L = 0xCD;
    
    PWM0H = 0x00;
    PWM1L = 0x28; 

    The part definitely isn't resetting, this would be a massive disaster for hardware because it is handling power. 

    We reconfigure P3.3 as a GPIO to set PWM duty cycle to 100% 0 when disabled but that is something I have double and triple checked to be sure the system weren't reconfiguring pin when we don't want it. What is also strange to me is that the fail occurs only on one PWM period.

    Do you think that any other pin reconfiguration could cause a PWM fail like that? 

    Regards

    Federico D. Ceccarelli

  • You mentioned that the failure occurs only in one PWM period. Does this mean that it only happens once during the entire testing?

    Is there anything else configured aside from the PWM registers during your testing? Are you using any other functionality of the device?

    Other pin reconfiguration should not have any effect on the PWM.