What are the output voltage levels for ADCMP580 and does ADI offer logic level conversion circuits that would enable this component to interface with an FPGA operating at 3.3 V logic?

 

Answer:

Output of ADCMP580 is CML. VOH and VOL levels can be found in the electrical characteristics section of the datasheet as shown below:

 

If the FPGA that the customer is using has LVDS inputs, then they can easily interface between CML and LVDS using notes from this guide Microsoft Word - Hfan10v2_4-08.doc

If the FPGA used does not have LVDS inputs, customers can look for a CML to CMOS/TTL/LVTTL converter IC.

 

Tags: ADCMP580BCPZ-RL7 adcmp580 Interfacing with an FPGA using ADCMP580 High Speed Comparators (<100ns Propagation Delay) KB-18589 Show More