am measuring gain input to output at 1kHz with FRA and normalising gain to 1 at
2V peak input. At < 2V input gain stays at 1. As the input level is increased,
gain rises to 1.001 (0.1%) at 2.7V peak in. The datasheet states 100dB open
loop gain with 3V out. Where is the non linearity coming from?
One feature of the AD8066 is it's "dual" input stage.
For input common mode voltages between -Vs and +Vs-3V (typ) the devices FET
input stage is used giving low input bias current, low offset etc.
Once the common mode input voltage is in the range +Vs-3V typ to +Vs, then a
second input pair based on bipolar transistors comes into play.
This second pair ensures that the device will still behave "like an op amp" (no
phase reversal or saturation etc) but the input bias current is much larger and
the offset is also larger.
Please see figures 30 and 32 as well as description on page 18.
I suggest that the larger input levels are crossing the threshold between the
FET region and the bipolar region and therefore giving you this slightly
You can get around this by biasing the input signal at a lower common mode
level in order to keep the absolute input voltage between -5V and +2V for +/-5V