output balance (TPC 26). We see balance error -40 dB (Vin 2V p-p, resistor
Please try measuring the output balance error , using the same set-up as the
datasheet for comparison purposes....i.e using VOCM = 2.5V, delta VOUT,cm/delta
VOUT,dm; delta VOUT,dm = 1 V. Our results show a performance of -65dbs .
The first requirement is for a good solid ground plane that covers as much of
the board area around the AD8138 as possible. The only exception to this is
that the two input pins (Pins 1 and 8) should be kept a few millimeters from
the ground plane, and ground should be removed from inner layers and the
opposite side of the board under the input pins. This will minimize the stray
capacitance on these nodes and help preserve the gain flatness versus frequency.
The power supply pins should be bypassed as close as possible to the device to
the nearby ground plane. Good high frequency ceramic chip capacitors should be
used. This bypassing should be done with a capacitance value of 0.01 uF to 0.1
uF for each supply. Further away, low frequency bypassing should be provided
with 10 uF tantalum capacitors from each supply to ground.
The signal routing should be short and direct to avoid parasitic effects.
Wherever there are complementary signals, a symmetrical layout should be
provided to the extent possible to maximize the balance performance. When
running differential signals over a long distance, the traces on the PCB should
be close together or any differential wiring should be twisted together to
minimize the area of the loop that is formed. This will reduce the radiated
energy and make the circuit less susceptible to interference.