for the ADA4000-2 analog inputs such that there is no permanent damage to the
Under the Abs. Max. section of the data sheet, the maximum voltage for any
input is +/-Vs. The primary reason for this limitation is that there are ESD
protection diodes that connect from each input
(and output) to each of the power supplies. Thus, there is an ESD diode from
each input that points toward +Vs and other ESD diodes from -Vs that points
toward each input.
If the supply voltage is exceeded in either direction by more than a diode
drop, the ESD diode will begin to conduct. If the current is not limited, the
ESD diode will burn out and damage the part. We do not provide full
specifications for these ESD diodes. As their name suggests, they are intended
to protect against ESD damage during normal part handling and assembly. As a
practical matter, these diodes can withstand a constant forward current of 10s
of mA (~70-100), but we do not provide full characterization for this
parameter. If the overdrive is a short-duration pulse, then the peak current
can be considerably higher than this (as is the case for an actual ESD
event),and the maximum depends on the time-current profile of the overdrive.
A simple way to limit the amount of current is to provide a series resistor,
Rs, at the input. Depending on the value, this will influence the analog
performance to varying degrees. There are three parameters of
concern here: the input resistance, Rin, the input capacitance, Cin, and the
input bias current, Ib. These three parameters will correspondingly affect the
attenuation, the freq roll-off, and the dc offset. However, for small values of
Rs (~100 ohms or so), these effects should be minimal.
I also assume that it is the case that the overdrive signal source will have
some current limitation, This should also be factored into the sizing of Rs (
if Rs is necessary ).
Further protection can be added by external protection diodes to the circuit,
along with Rs. Schottky diodes have a lower Vf than the on-chip Si diodes, so
these will turn on at a lower voltage and conduct
a majority of the overdrive current. The circuit should have two Schottky
diodes per input and be connected to each power supply in the manner described
above for the on-chip ESD diodes.
Overall, the basic concern is to not damage the on-chip ESD diodes due to an
excessive power-time profile overdrive event(s). This implies overdrive due to
both ac and dc conditions. It is not possible for us to
explicitly define a complete set of conditions that delineates the regions of
safe and unsafe operation. I hope that the general guidelines that I have
provided are helpful.
Note: with most JFETS o/p phase reversal occurs when the i/p common mode is
exceeded due to i/p stage saturation, however, if the current is limited, then
this should not happen. Check application notes AN-202 and AN-397 on Analog
Devices website for more information on overvoltage protection.