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setting up a low corner for the OFST high-pass filter.

Category: Datasheet/Specs
Product Number: AD8330

I'm trying to understand the reason for setting the HPF filter cap from OFST to CNTR rather than to ground.  If Cntr is being driven by a low impedance Vref it shouldn't matter.  Since they are both DC. 

But your data sheet gives other options, like leaving CNTR floating and lightly bypassed. (eg 0.1uF in the eval board schematic, pg 29 of Rev H datasheet)   

Now in the Offset Compensation section (pg 20, near eq 12) You suggest a 3.3uF Chp to get a 100 Hz corner.   In that case the filter cap is 33x the bypass cap value, so it's clearly going to alter the performance. 


Do you intend to feed a signal from OFST back into the CNTR pin in these cases?   If so, you need to take the bias resistors and bypass caps on CNTR into account.  Also, how would this work if CNTR was drive by a DC reference?

If you do NOT intend for OFST to feedback into and affect the CNTR voltage, why bypass to there instead of to ground?  Also, how can your 3.3uF 100Hz cap possibly work?


In my application I'm targeting Vocm of ~ 1V and it seems I can hit that with a 2.67k R from CNTR to GND, with a suitable bypass cap in parallel to it. (0.1uF? 1uF?)

But I also want a HPF corner of 145 Hz, so eq 12 is telling me to use ~ 2.2uF  But Eq 2 is only taking into account the internal 480 ohm Rint on OFST.  In this case, it seems that OFST would be modulating the CNTR voltage and that the effective impedance of CNTR to GND would dramatically alter the corner frequency.

Am I thinking about this wrong, or did you just mess up the suggestions for low freq HPF in the data sheet?

  • HI  

    The concern is understandable if CHPF is viewed as a simple external capacitor returning through the CNTR impedance. However, CHPF is part of the AD8330 internal offset-correction loop, and the datasheet equation indicates that the dominant resistance setting the pole is the internal OFST resistance, not the external CNTR pulldown resistance.

    I checked this on AD8330 evaluation board with CHPF = 2.2uF, and CNTR pulled to about 1V using 2.7kΩ to ground. The expected corner using this setup is 151Hz.

    For bench check, since the eval board has onboard AD8131 driver to the INHI/INLO pins, I simply increased the input coupling capacitors C3 and C5 to 47uF so that the eval board input AC-coupling pole would not dominate the low frequency measurement. VDBS was set to 0v with the board configured for 0dB gain. 

    The measured response was broadly consistent with a corner near the datasheet prediction:

    Passband output is 770mVpp, so -3dB level of about 544mVpp
    Measured output at 150Hz = 555 mVpp

    This result did not shift toward much lower frequency that I would expect if the external CNTR pull-down impedance were contributing to the internal offset correction loop. CNTR should still be decoupled as recommended, but this bench check means that the CNTR pulldown resistor does not modify the CHPF corner in that simple RC manner.

    Best Regards,
    Ian