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AD605 self excited

We are now trying to build a multi-channel ultra-sonar receiving system. For the sake of power consumption and budget consideration, each 8 channels are multiplexed into one after the band pass stage; as a result, the whole 384 channel data can be sampled by 48 16-bit ADCs. The BP has a central frequency of 300kHz and a band width of about 30kHz.

Since we need a dynamic range of 96dB, we are using AD605 for the VGA stage. By default AD605 receives a differential input and gives a single end output, but we use single end mode for both input and output, because it says OK in the datasheet.

The problem we are facing is that the chips (AD605) we are testing are easy to get self excited, when VGN exceeds 2V. It looks like as VGN goes higher, the output signal is modulated by a high frequency (about 13~19MkHz), and if VGN is higher enough, there is a very high frequency output, even when no input signal is applied. This is hard to explain. Cans some help?

(some figures are included in the attched docx for better illustrating)

Pretty simple;  you have 10-20 dB gain at 40 MHz, and parasitic coupling from output to input

in your layout.

Harry


  • harry,

            thanks for your reply.

            you have 10-20 dB gain at 40 MHz.---how did you figure that out?

            parasitic coupling from output to input in your layout. -- how? i mean there is even no path outside the IC

  • I have made a breadboard and a 4 layer PCB board. The testing results of these two are pretty the same, when the input signal (a 300kHz sine wave from Agilent wave generator) is too small, VGN can not exceed about 2.0V, otherwise the output will be modulated. However, if the inpout signal is large enough, then it is OK to raise VGN to 2.5V, although at this time the output is saturated and is a square wave.

    I have tested different pieces of AD605s from different vendors, so maybe low possibility of inferior goods.

    and BTW, the four layers of my evm PCB are top(signal and packages), Ground, power(5V and 2.5V plane) and Bottom( within ten clines). neighter the top nor the bottom layer is ground plane covered.

  • Is this a pc board?  How many layers? or breadboard?

    Picture of the board?

    Harry


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