Q&A - Recent Threads

AD8219 with separate supplies-sanity check

Bobbo — Mon, 18 May 2026 10:06:25 GMT

I'm looking at using the AD8219 for a pretty standard current measurement, but with a varying voltage of 1-45V, 0-2.5A on the measured side. The output will be 0-5V into an ADC. Can I have 5V into Vs, whilst +IN and -IN go up to 45V, or do I need to fit a diode to keep Vs greater than or equal to the voltage on the inputs?

Thanks,

Dave

AD8210 with low sense voltage

SteScre — Wed, 11 Mar 2026 17:41:16 GMT

Deal All,

I've a problem with LT Spice simulation of AD8210 (model downloaded from Analog website).

I need to measure load current from 0 to 20A. For this purpose, I've designed a circuit with a 4mohm Rsense and REF1, REF2 pins connected to GND for unidirectional operation with groun referenced output.

From simulation rresults that when the output current is 0A, the output monitor is 50mV (according to offset reported in datasheet), but when the output current is 1A, the output monitor is still 50mV.

The output monitor starts to move (from 50mV to 54mV) whit 1.1A output current.

With 20A the monitor is 1.57V.

My questions are:

- why the output monitor voltage remains at 50mV with 1A of output current?

- why with 20A the output monitor voltage is not: 20A x 4mohm x 20V/V = 1.6V?

This can be due to low value of Rsense (4mohm)?

Attached the circuit simulated and plot results

Thanks in advance for your reply and support.

Kind Regards

Stefano

AD5522 Internal COMPARATOR Hysteresis

baggio — Thu, 05 Mar 2026 09:34:54 GMT

Hello.

I would like to know the hysteresis of the AD5522 COMPARATOR.

Can you provide the hysteresis data?

Best Regards.

Unidirectional current sensing with MAX49925

Arikayaaa — Mon, 02 Mar 2026 07:56:58 GMT

Does this IC supports unidirectional current sensing if I connect VREF pins to ground?

AD598 EXCITATION OUTPUT CURRENT

Bulent Kupeli — Fri, 13 Feb 2026 09:03:18 GMT

Hi,

Can I learn maximum excitation output current of AD598? The datasheet show only minimum current and what thus it mean?

Thanks

Bulent

LTSPICE simulation does not converge

LucDL — Thu, 12 Feb 2026 14:11:45 GMT

Hello,

I am currently evaluating an instrumentation chain consisting of LT1997-2 under LTSPICE. The idea is to measure voltages across capacitors, which are currently replaced by capacitors.

When I simulate the LT1997-2 with a gain of 0.16 and powered between 0 and 5V to measure a differential voltage across a voltage source, everything works fine.

When I add a voltage source below the first one to create common mode, everything still works correctly.
The problem arises when I add a second LT1997-2 to measure the differential voltage across the second voltage source, which is referenced to ground.

I don't understand where the problem comes from, since during my first test with a single voltage source, the simulation converged correctly even though one of the LT1997-2 inputs was connected directly to ground.

Has anyone else encountered this problem, or do you have any suggestions?

ADA4355 connecting to zedboard and SPI operation

jacobeluz — Thu, 05 Feb 2026 08:52:29 GMT

I designed a card laying on the eval board of the ada4355

and try to connect it to the zedboard using the FMC connector

I am using internal SPI using ZYNQ FPGA (on zedboard to control the ada4355)

how do I enable the SPI and I2C to control my board with ada4355

tnx

jacob

MAX40660 Fab Process

mspalluzzi — Wed, 04 Feb 2026 21:39:03 GMT

What is the fab process for MAX40660?

I have made a Schematic for MAX12900. Can someone verify it?

Swayash — Tue, 03 Feb 2026 21:07:17 GMT

Hello, I have made a schematic for MAX12900. I am using it to control a 4-20 mA loop. The circuit is loop powered. So I am using a DC-DC converter to power up the circuit. I have followed the recommended circuits from datasheet. Can someone please verify it?

Thanks in Advance.

ez.analog.com/.../0160.TX_5F00_SCH.pdf

ADATE207 & ADATE305: Baking requirements

LCK — Tue, 03 Feb 2026 21:06:13 GMT

Hi EZ team,

My customer needs to know the baking requirements for ADATE207 and ADATE305.

Can anybody advise where could I source from? Thanks!

Can I do initial calibration of ADATE305 ?

Aggil — Tue, 03 Feb 2026 21:05:53 GMT

Output of DUT0 /DUT1 is differente when the power supply and code are all the same, Can I do the initial calibration ? And how do it ?

Another, different chips at the same code, same power supply , the output voltage are differente. This also need calibration.

thanks

AD8015/LT1394 fiber optic receiver circuit

mike60510 — Tue, 03 Feb 2026 21:04:31 GMT

I am using an AD8015 as a fiber optic receiver. The differential output from the AD8015 feeds into an LT1394 comparator. The AD8015 appears to be working correctly, but when a fiber optic signal is received the output of the LT1394 locks up. If I remove the fiber optic input, the LT1394 outputs stay in the same state and will not operate properly without a power cycle. The Latch Enable pin on the LT1394 is tied to ground so that is not the problem. Any ideas?

ADATE305 power sequence

RayW — Tue, 03 Feb 2026 21:04:23 GMT

Hi ADI expert,

After I checked ADATE305 datasheet, there are no any power sequence suggestion and hardware design guide.

But ADATE305 supplied multiple power rail input, e.g. Vplus+16.75V /Vdd +10V /Vss-5.25V /Vcc+3.3V /Vref+5V /Vcomp_Vtt +5V.

May I have your confirmed for power sequence and any related design documents,Thanks.

Best regards.

Ray.

AD5560 Current Clamps accuracy

Vladimir ALEX — Tue, 03 Feb 2026 21:04:03 GMT

Hello,

I have some quetions about current clamps AD5560.

1) If i do not use offset (CLH, CLL), it is mean that current range is simmetrical (for example -500 mA to 500 mA)

2) I use current range -25...25 mA, then i set CLH 18,75 mA - measuring value is ~ 21 mA, CLL -18,75 mA -measuring value is ~ -20,6 mA. For other points i have the same offset current (for every current range). Is it correct? How can I set current clamp more accuracy? By using register CLL DAC c, CLL DAC m, CLH DAC c, CLH DAC m?

3) What is the minimum current limit value? + 10% of full-scale current (according with datasheet DUT current can never exceed the programmed clamp limit + 10% of full-scale current)?

Thank you.

About AD5560 output

angelic — Tue, 03 Feb 2026 21:03:57 GMT

Dear Sir or Madam

Can AD5560 sink current while forcing a positive voltage , in such as FVMI mode ?

sincerely ,

Best regards

Anglic

ADATE209 Propagation Delay

Tim Setzer — Tue, 03 Feb 2026 21:03:48 GMT

Hello Community,

I want to use multiple ADATE209 to create synchronized outputs. I think the specs fit quite well to my application. Then I stumbled over the huge tolerance in propagation delay starting from 300ps up to 1400ps. Can someone tell me, which factors influence the delay the most and why is the span so huge?

Greetings,

Tim

about AD5522 software source code

Mars.Chang — Tue, 03 Feb 2026 21:03:18 GMT

Hi,

my customer is finding AD5522 software source code.....

Does it can provide ??

Simulation Pspice AD694

JRiffaud — Tue, 03 Feb 2026 21:03:12 GMT

Bonjour,

Je souhaite réaliser une sortie 0_20mA et 4_20mA en utilisant la sortie 0 ... 3V de mon DAC. Pour cela je souhaite utiliser le composant AD694 de analog devices. Mais avant d'aller plus loin, je souhaiterai faire une simulation avec Pspice, mais impossible de trouver ce composant dans les librairies d'analog devices.

Quelqu'un sait si ce composant est disponible en simulation Pspice ?

Merci

Need support of ADATE320 and ADATE209

kangqiaoyibie — Tue, 03 Feb 2026 21:02:47 GMT

I am writing for support of ADATE320 and ADATE209.

In our project, ADATE320 is uesd to realize 1.6 Gbps LVDS signal adjust.

Original LVDS signals comes from FPGA (Xilinx HP bank). There is my first

question, could you give us a circuit of typical application ?

And we want to increase data rate from 1.6 Gbps to 2.5 Gbps ,or 3.2 Gbps.

We get imformation from ADATE209 datasheet shows that ADATE209 will

meet our application requirement. But we can't understand how it works. Could you

help us about this?

Best regards.

AD8212S

Gribikc — Tue, 03 Feb 2026 21:02:43 GMT

Good afternoon, I can't find any information about pins forming for creating footprints in Mentor Graphics. Would you be so kind to help me? Best regards Andrey

AD5522 Eval Board idle temperature

bskhoo — Tue, 03 Feb 2026 20:50:43 GMT

Hi,

My customer noticed that the AD5522 Eval Board run hot when idle(no load ,output disable) ca. 70°C

From the reference design, ADI does not mention any heat sink required .

Is this typical? I doubt that we can achieve the spec at that temperature.

Where can I get the thermal characteristic for the chip.

Thank you.

Regards,

BS Khoo

ADATE305 question

Aggil — Tue, 03 Feb 2026 20:50:40 GMT

Some quesiton about ADATE305 need to check, pls help. thanks

When we input a square signal to DATA0P/N, RCV0P/N, DUT0 pin output the data. We tested the delay time is 10ns at longest. It is not accord with 250mHZ in the datasheet, is that right ?

When we tie multi ADATE305’s SDOUT together and then connect to the FPGA, we find the high level of SDOUT is only dozens of mV. When only one chip's SDOUT, the high level of SDOUT is 3.3V. Can the SDOUT of multi ADATE305 tie together ?

AD5522 can not communicate via SPI?

Satelives — Tue, 03 Feb 2026 20:50:22 GMT

Hi All:

I have a AD5522 Evaluation Board,and it's work well on Evaluation Software 1.6.1.

Now I want to use my STM32F103ZE to control the AD5522,but I can't communicate with AD5522 via SPI.

It's Evaluation Software timing,I want to read system control register,so I click READ SYSTEM CONTROL REGISTER ,and then, the software will send 0x10000000 to AD5522,and AD5522 will return 0x00000020 to me, it's work well in anytime.

Write 0x10000000

Read 0x000020 (Default value when AD5522 power on)

Now,I want to use my STM32F103ZE to read system control register,so I connect STM32F103ZE and AD5522,and remove the LK9 to disable USB function.As show below picture.

The first time,STM32F103ZE will send the command 0x10000000 to AD5522,that meaning read system control register

And then,STM32F103ZE will send 0xFFFFFF try to read data from AD5522, but the Busy pin goes low when 19th rising clock edge of SPI-CLOCK? Even so the result is 0x000020,that is true.

But the second time,STM32F103ZE send the command 0x10000000 to AD5522 again,the Busy pin goes low when 5th rising clock edge of SPI-CLOCK and 31th rising clock edge.

And then ,result is 0x000000,that's wrong(0x000020 is true).

Simulation SPI Code:

uint32_t AD5522_SPI(uint16_t bits, uint32_t dat)

{

uint32_t Recvice = 0;

uint8_t i;

AD5522_CS_L;

AD5522_Delay(2);

//bits = 32 when write data to AD5522 and bits = 24 when read data from AD5522

for(i = 0; i < bits; i++)

{

if(dat & 0x80000000) //MSB

{

AD5522_MOSI_H;

}

else

{

AD5522_MOSI_L;

}

//CLOCK High

AD5522_CLK_H;

dat <<= 1;

Recvice <<= 1;

AD5522_Delay(1);

AD5522_CLK_L;

if(AD5522_MISO) //Read data when CLOCK falling edge.

{

Recvice++;

}

AD5522_Delay(3)

}

AD5522_Delay(1);

AD5522_CS_H;

AD5522_CLK_L; //Idle time,CLOCK is low

AD5522_MOSI_L; //Idle time,MOSI is low

return Recvice;

}

This problem puzzle me three days,can you help me?

sorry for my bad English.

thanks.

AD5522 EVB Sweep Timing

cnb74510 — Tue, 03 Feb 2026 20:50:10 GMT

I am currently using the AD5522 Eval board to finding out what is the minimum step ramp time for a voltage sweep. I keep getting a minimum of 20mS step time when no delays are selected.

Is this the minimum that can be set or is there something in the EVB software that sets this to 20mS?

Is the software code available so we can perhaps look into how the sweep functions are handled?

Thank you

A series of questions about ADATE318

yssy2000 — Tue, 03 Feb 2026 20:48:27 GMT

1. How to get the ibis model of the ADATE318?

2. What the difference between the pin PPMU_Sx and PMU_Sx? How to use these pins in application?

3. How to connect the kinds of GND in the application, such AGND, PGND, DGND, DUTGND, VREFGND.

4. Do you have EVM board of ADATE318 for reference?