I am trying to use the AD8479 as a 200V high side current sense amplifier. In simulation I see ~4mV offset at VOUT which is presume is due to the internal resistance mismatch to GND through VREF. Can all the internal resistance values be provided to calculate an offset, or must I do some board calibration to account for the drop? Is it possible that simulation does not reflect actual performance? Adding Rcomp doesn't seem to solve the problem.



