LTC6260 input damage / increased supply current – known field failure mechanisms

Question

We have a deployed product using LTC6260 (quad version) in a low-power receive signal chain. LTC6260 is powered from 1.8V and one channel has its non-inverting input AC-coupled from a piezo transducer receive path and biased at approximately 0.9V. 
 We have seen several field returns. The failure mode appears consistent across boards: 
 
 +1.8V rail develops elevated current consumption (~10x normal wake current) 
 Thermal imaging shows LTC6260 heating 
 One channel input appears damaged 
 Specifically, non-inverting input of one amplifier section measures approximately 2-25&Omega; to GND unpowered 
 Remaining amplifier sections on the same package appear normal 
 Replacing the LTC6260 is expected to restore operation (still being verified on all units) 
 
 The system passed manufacturing functional test before shipment, including acoustic wake detection using this receive chain. 
 We are investigating several possibilities: 
 
 repetitive EOS/transient stress at the input 
 mechanical/piezo-generated transients 
 powered/unpowered input stress 
 handling or latent damage 
 
 Some additional observations: 
 
 During normal transmit operation, the input node appears to remain approximately within supply rails. 
 With the board unpowered, mechanical shock to the connected piezo transducer can produce negative excursions on the affected input node (measured below -0.5V in some cases). 
 We have not yet reproduced a permanent failure in the lab despite deliberate abuse testing. 
 
 Questions: 
 
 Are there any known field issues or application sensitivities involving LTC6260 input structures that are not obvious from the datasheet? 
 Is there known susceptibility to repeated out-of-rail input excursions, especially while unpowered? 
 Have you seen failure modes where one input degrades into a low-ohmic path to ground while the remainder of the device continues functioning? 
 Any recommendations for external input protection beyond standard rail steering / current limiting? 
 
 I understand LTC6260 is NRND / last-time-buy, and this design has already been re-designed to use different opamp, but I would appreciate any historical application knowledge or failure mechanisms others may have encountered. We are currently not confident in the root-cause of why these opamps became damaged. 
 Thanks.

Arsol · Accepted Answer

Hi JMJEngineeringConsulting 
 
 Thank you for the patience and the detailed information&mdash;this is very helpful. 
 The reported failure (localized input damage, low-ohmic path to ground, elevated supply current, and thermal heating) is consistent with input structure overstress on a single channel, while the rest of the device remains functional. 
 Based on your measurements, the most likely mechanism is repetitive input overstress due to out-of-rail excursions, particularly: 
 
 Negative voltage excursions at the input (e.g., below &ndash;0.5 V) 
 Events occurring while the device is unpowered 
 
 In this condition, the internal protection structures (ESD/input clamps) can conduct. Repeated exposure&mdash;especially from a piezo source with relatively high transient energy&mdash;may lead to cumulative damage, eventually resulting in a low-resistance path to ground as observed. 
 The fact that: Only one channel is affected. The failure is not immediately reproducible in lab stress testing supports a time-dependent EOS mechanism rather than a single catastrophic event. 
 We are not aware of specific field issues unique to LTC6260, but like many high-speed/low-bias amplifiers, it can be sensitive to repeated out-of-rail input stress, especially when unpowered. 
 Yes, susceptibility to unpowered input stress and repetitive excursions beyond the rails is a known general risk for op amp input structures. The failure mode you are seeing (single channel degrading to a low-ohmic path) is consistent with localized input protection damage. 
 To improve robustness&mdash;particularly with piezo-driven inputs&mdash;we recommend: 
 
 Adding a series input resistor to limit transient current 
 Using external clamp diodes to prevent the input from exceeding supply rails 
 Adding a Schottky clamp to ground to limit negative excursions 
 Considering RC damping at the input to reduce transient energy 
 Ensuring the input node has a defined bias path when the system is unpowered 
 
 If we may ask, to share your applications circuit / schematic so our team can review further. 
 I added an alternative in case you are looking for options.

I inserted here a protection circuit example that you can refer to: 
 
 We hope this helps guide your root-cause investigation. 
 Thanks,)

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LTC6260 input damage / increased supply current – known field failure mechanisms

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