Hi, I am planning to build a current booster using LT6018 + LT1010, using the circuit of Figure 2 from AN18 written by jim williams.
Though in this post, About the current boost amplifier using LT1010 (AN18) - Q&A - Amplifiers - EngineerZone (analog.com) The power to LT1010 can not be correct simulated. I still want to implement this simulation using LTSpice first and then build a prototype to test its performance. The BJT models of 2N3904, 2N3906, MJE2955, MJE3055 are download from on semiconductor website, and these lines are append to the end of LTC/lib/cmp/standard.bjt
.MODEL Q2N3904 NPN(IS=1.26532e-10 BF=206.302 NF=1.5 VAF=1000 IKF=0.0272221 ISE=2.30771e-09 NE=3.31052 BR=20.6302 NR=2.89609 VAR=9.39809 IKR=0.272221 ISC=2.30771e-09 NC=1.9876 RB=5.8376 IRB=50.3624 RBM=0.634251 RE=0.0001 RC=2.65711 XTB=0.1 XTI=1 EG=1.05 CJE=4.64214e-12 VJE=0.4 MJE=0.256227 TF=4.19578e-10 XTF=0.906167 VTF=8.75418 ITF=0.0105823 CJC=3.76961e-12 VJC=0.4 MJC=0.238109 XCJC=0.8 FC=0.512134 CJS=0 VJS=0.75 MJS=0.5 TR=6.82023e-08 PTF=0 KF=0 AF=1) .MODEL Q2N3906 PNP(IS=7.75521e-12 BF=194.093 NF=1.35509 VAF=156.436 IKF=0.0660057 ISE=1.88546e-12 NE=1.81673 BR=3.41317 NR=1.5 VAR=5.86061 IKR=1.70599 ISC=7.64281e-10 NC=1.92376 RB=6.48961 IRB=0.1 RBM=0.1 RE=0.0001 RC=2.45044 XTB=0.1 XTI=1 EG=1.05 CJE=6.11928e-12 VJE=0.4 MJE=0.248812 TF=5.21843e-10 XTF=0.932702 VTF=9.1046 ITF=0.0106472 CJC=6.85007e-12 VJC=0.4 MJC=0.279018 XCJC=0.9 FC=0.478887 CJS=0 VJS=0.75 MJS=0.5 TR=4.30605e-07 PTF=0 KF=0 AF=1) .MODEL QMJE2955T PNP(IS=4.14254e-10 BF=449.16 NF=0.85 VAF=17.4911 IKF=0.414206 ISE=1e-08 NE=1.47014 BR=0.1 NR=1.09325 VAR=174.911 IKR=4.14206 ISC=7.59792e-09 NC=3.02799 RB=20.1795 IRB=0.1 RBM=0.1 RE=0.000499379 RC=0.0813684 XTB=0.1 XTI=1.16399 EG=1.05 CJE=9.97416e-08 VJE=0.416937 MJE=0.61618 TF=9.98874e-09 XTF=1.35736 VTF=0.997021 ITF=0.999788 CJC=4.99998e-10 VJC=0.40025 MJC=0.410011 XCJC=0.803124 FC=0.661649 CJS=0 VJS=0.75 MJS=0.5 TR=1e-07 PTF=0 KF=0 AF=1) .MODEL QMJE3055T NPN(IS=1.92238e-13 BF=327.43 NF=0.85 VAF=36.105 IKF=0.620037 ISE=1.4602e-10 NE=1.50926 BR=0.654697 NR=0.935367 VAR=361.05 IKR=6.20037 ISC=6.85154e-12 NC=2.96871 RB=16.05 IRB=0.1 RBM=0.161446 RE=0.000602331 RC=0.0632768 XTB=0.943656 XTI=1.12302 EG=1.05 CJE=9.23675e-08 VJE=0.506151 MJE=0.607139 TF=1e-08 XTF=1.35736 VTF=0.997047 ITF=0.999796 CJC=5e-10 VJC=0.400198 MJC=0.410184 XCJC=0.803125 FC=0.658133 CJS=0 VJS=0.75 MJS=0.5 TR=1e-07 PTF=0 KF=0 AF=1)
The simulation circuit was exactly the same as AN18, but with LT1056 replaced by LT6018 for better DC and drift performances.

My questions are
1, As LTSpice can not correctly model the power current, so there is crossover distortions in the simulation. Can we guarantee that If I fabricated a PCB board, the crossover distortion is minimized? What level of THD could I obtain and how could I simulate or measure it?
2, In AN18f, Jim states that "At full power (±10V, 3A peaks), bandwidth is 100kHz and slew rate about 10V/μs." (pp3 of AN18.pdf) But in a AC analysis, the bandwidth is only <10KHz and there are slew rate distortions at larger frequencies (50KHz).


Please help~
Edit Notes
correct some typos.[edited by: liubenyuan at 6:37 AM (GMT -4) on 22 Apr 2022]