LTC6268 Bare Die Pad Layout


For a research project I am working on I need to use the LTC6268-10 op-amp. In my project I need to reduce the parasitic capacitance as much as possible. As a result, I am trying to get bare-die of this op-amp and directly wirebond it to another chip. After talking to customer support I have found that I can't acquire bare die of this op-amp. As a result, I have been using a nitric acid etch to remove the bare die from it's packaging (which has worked well). However, after acid etching I don't know what each of the pads correspond to. I was wondering if I could get a quick schematic of the positions of the pads on the die and what they map to in the package?

Thank you,