AD829 stability

Hello,

Is the AD829 stable in the following conditions ? What is the Phase Margin ?

- CL=150pF capacitor load

- RL=~1kohms resistor load

- Vs = +/- 5V

- Ccomp = 15pF to inverted input

I attached the schematic (VEE = -5V and VCC = +5V).

Can I simulate the phase margin with PSPICE and how ? Is the model realistic in theses conditions ?

Thanks for your answer,

Mathieu

  • Hi Charly,

    Yes, I know and I checked it by simulation, but I can't add a serial resistor.

    But even if I do this modification, how can I be sure that it is stable if I can't simulate the phase margin of the circuit because the model is not representative ?

    Probing the output is sufficient to prove that the circuit is stable.

    If I can't know stability by simulation, what other test can we do ?

  • Can you tie at your output an RC to ground? (R=50, and C=200pF) to see if that eliminate the oscillation?

    If that is not an option as well, then you need to reduce your CL until your amplifier is stable.

    Charly

  • 1 - I checked on my board, there is no oscillation with the the schematics attached on the first message. Could you please confirm that you measured an oscillation and show the print screen of the oscilloscope ?

    2 - If there is no oscillation like on my board, how can I prove that the circuit is stable if the Pspice model is not representative ?

    Please remember that in my first message, I didn't think that my circuit was not stable. I had never meadured an oscillation before.

    I just wanted to know :

    - if with this type of compensation, the AD829 was capable of driving such a capacitor load (150pF)

    - and how determine the phase margin by simulation

    Regards,

    Mathieu

  • Hi Mathieu,

    I apologize for the delay on this response. As I mentioned, the AD829 is a very old part, and unfortunately, I would not trust the SPICE model to be reliable in simulation. However, I revisited my circuit and we are now getting the same results on our circuit, i.e. no oscillation. In addition, I brought the capacitive load up to 560pF without seeing any oscillation at the output. One of the other methods I tried to get an idea of the stability of the circuit was to apply a step input and see how much overshoot was present at a 150pF load.

    I calculated the overshoot to be about 10%, which looks to be an acceptable figure. Hopefully, this figure will be enough to properly satisfy your requirement.

    Regards,

    Kris

  • Hi Kris,

    Great. Thank you for your answer.

    I have the same measure that in the first page but with a Ccomp = 12pF instead of 15pF.