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AD829 stability

Hello,

Is the AD829 stable in the following conditions ? What is the Phase Margin ?

- CL=150pF capacitor load

- RL=~1kohms resistor load

- Vs = +/- 5V

- Ccomp = 15pF to inverted input

I attached the schematic (VEE = -5V and VCC = +5V).

Can I simulate the phase margin with PSPICE and how ? Is the model realistic in theses conditions ?

Thanks for your answer,

Mathieu

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  • Hi Charly,

    Yes, I know and I checked it by simulation, but I can't add a serial resistor.

    But even if I do this modification, how can I be sure that it is stable if I can't simulate the phase margin of the circuit because the model is not representative ?

    Probing the output is sufficient to prove that the circuit is stable.

    If I can't know stability by simulation, what other test can we do ?

Reply
  • Hi Charly,

    Yes, I know and I checked it by simulation, but I can't add a serial resistor.

    But even if I do this modification, how can I be sure that it is stable if I can't simulate the phase margin of the circuit because the model is not representative ?

    Probing the output is sufficient to prove that the circuit is stable.

    If I can't know stability by simulation, what other test can we do ?

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