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AD829 stability

Hello,

Is the AD829 stable in the following conditions ? What is the Phase Margin ?

- CL=150pF capacitor load

- RL=~1kohms resistor load

- Vs = +/- 5V

- Ccomp = 15pF to inverted input

I attached the schematic (VEE = -5V and VCC = +5V).

Can I simulate the phase margin with PSPICE and how ? Is the model realistic in theses conditions ?

Thanks for your answer,

Mathieu

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  • Hi Kris,

    Thanks for you answer and I apologize for my approximative english.

    I can't change :

    - the gain of amplifier

    - the amplifier (only the AD829)

    - the type of compensation, because i need slew rate (above 60V/µs as a minimum)

    The only thing I can change is :

    - first of all, the value of Ccomp capacitor,

    - and if it is still not stable :

         - the value of capacitor load C61

         - or the value of resistors but without changing the gain

    Are you sure you tested the circuit with a capacitor load C61 = 150pF ?

    Could you please provide a screenshot of the oscillation ?

    Regards,

    Mathieu

Reply
  • Hi Kris,

    Thanks for you answer and I apologize for my approximative english.

    I can't change :

    - the gain of amplifier

    - the amplifier (only the AD829)

    - the type of compensation, because i need slew rate (above 60V/µs as a minimum)

    The only thing I can change is :

    - first of all, the value of Ccomp capacitor,

    - and if it is still not stable :

         - the value of capacitor load C61

         - or the value of resistors but without changing the gain

    Are you sure you tested the circuit with a capacitor load C61 = 150pF ?

    Could you please provide a screenshot of the oscillation ?

    Regards,

    Mathieu

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