Hi, I am having little trouble understanding the datasheet for AD8602.
On page 3, table 1, Input Offset Voltage(AD8601/AD8602) is 80uV for 0<VCM<1.3V. But 3 lines below, it says VOS is 350uV for 0<VCM<3V.
Does that mean Vos is typically 80uV from 0 to 1.3V and 350uV from 1.3 to 3?
Similarly, Vos is 700uV max for -40degC<TA<85degC and 1100uV max for -40degC<TA<125degC. I am little confused because Vos has different values for overlapping range of VCM and TA. Can anyone help me understand what they mean?
You can refer to figure 9 of the AD8602 datasheet (shown below) for the relationship of the input offset voltage with the common-mode voltage. For Vcm between 0 and 1.3V (yellow line), the offset is more or less 250uV (within blue lines) wherein the typical value of 80uV is within this range. For Vcm between 0 and 3V, the offset voltage that you may expect is more or less 350uV (within red lines) which is the same as the typical value. And for Vcm between 1.3V and 1.8V, you must expect that the offset will be higher than the specified values.
AD8602 was tested in both commercial (-40degC to 85degC) and industrial (-40degC to 125degC) temperature ranges. If you use the part for commercial application with Vs=3V and Vcm=0 to 1.3V, you would expect an offset voltage of 700uV(max) while a higher offset voltage of 1100uV(max) is expected for industrial application.
Hope this helps! Let me know if you have other concerns.
The statements in the data sheet mean the following:-
At 3V supply and 25°C ambient temperature and 0V<Vcm<1.3V the offset voltage is guaranteed to be within ±500μV, but most devices will be better than this so for first design calculations ±80μV is a good value ("typical") to use.
At 3V supply and an ambient temperature range of -40°C<Ta<+85°C and 0V<Vcm<1.3V the offset voltage is guaranteed to be within ±700μV, but most devices will be better than this so for first design calculations ±80μV is still a good value ("typical") to use if you are working with Vcm in this range.
Above +85°C offsets vary slightly more so at 3V supply and an ambient temperature range of -40°C<Ta<+125°C and 0V<Vcm<1.3V the offset voltage is only guaranteed to be within ±1100μV, but most devices will be better than this so for first design calculations ±80μV is even now still a good value ("typical") to use if you are working with Vcm in this range.
Rail-rail CMOS input stages usually contain two input stages, one works near the negative rail, one works near the positive rail. In between one hands over to the other. When the AD8602 is working with a 3V supply this handover takes place at values of Vcm between 1.3V and 1.8 V and in this region, as indicated by the footnote on the data sheet, the offsets are not guaranteed, although Fig 9 shows clearly that things are not particularly bad even here but your design calculations should allow for somewhat larger offsets. Personally I should use the suggested "typical" value of ±350μV and expect to be reasonably safe.
When Vcm>1.8V things get better again. The guaranteed offsets are ±750μV, ±1800μV, & ±2100μV at Ta=25°C, -40°C<Ta<+85°C, & -40°C<Ta<+125°C respectively.
Note also the next page. At 5V supply the handover between the input stages is less disruptive and the offset is guaranteed to be better than ±500μV at Ta=25°C, and better than ±1300μV at -40°C<Tc<+125°C, with no exceptions. This cleaner behavious is clearly shown in Fig 10 of the data sheet and a good "typical" value over the whol Vcm range is the same ±80μV which was recommended only for 0V<Vcm<1.3V with a 3V supply.
I hope this makes things clear. I do suggest that you visit the Analog Devices' "Rarely Asked Questions" site at
http://www.analog.com/en/content/RAQ_index/fca.html?ref=ASC267 and read the article on interpreting data sheets
and its linked articles
The rest of the RAQ columns are fun to read, too, and often useful.
Thank you Anna and James. Both explanations were extremely helpful.