Slew rate VS input level (ad8641?)

Hi,

I'm pretty new to analog electronic. I've been learning from appnotes and datasheets, and i've sometime seen reference of slew rate VS input level.

I've understood the effect of slew rate in audio, and i'm sure it's a really important parameter as it can act like a distording filter for higher frequencies if its too low. But in most of datasheets, there is nothing about that. So, i'll try to explain what i've understood.

For op amp being stable at unity gain, they got (often/alway?) a internal compensation capacitor wich can be charged from power supply, or bias current, depending on designs. I've seen sometime graphs that show slew rate is lower for lower inputs. Slew rate being maximal at the max input range.

So, using a low power opamp for portable audio, slew rate depend more of input voltage. I need/want a low power op amp for low gain (1-18). But input varies is bellow 3Vpp. So, if slew rate varie too, low level signal can be "slewing" at higher frequencies.

The ad8641 interest me a lot, because i need high impedance (> 5M) input with low power (so one op amp single ended), so low bias current to reduce noise of the resistor going to ground, and that can be power supplied at +/-9v simply with 2 9v batteries giving a true ground. As i need 5 stages, it would be long lasting enough with the ad8641.

But from what i've understand, i cannot be sure to  not be "slew-rate" limited since there is nothing on the datasheet about this.

From what i was able to understand, does it means that the ad8641 (powered at +/-13v) have a 3v/us slew rate at output ONLY near it maximum input voltage range (around 20Vpp) ?

What kind of slew rate can be expected of the ad8641 below 3Vpp  ?

From what i've seen on some forum, I suspect that this slew rate limiting/filtering can be pleasant and volontary used in some audio effecy designs.

Thanks

  • Hi Noury,

    The slew rate of AD8641 is specified at typical value of 3 V/us at +/- 13 V supply voltage. You should expect this value of slew rate even if your input is below 3 Vpp. Slew rate of an amplifier is define as the maximum rate of change of voltage at its output. It also tells us how high in frequency the amplifier can go for a certain voltage level. So if you want to know the minimum slew rate that you need, you can refer to the equation below:

                                        Slew rate = 2 x π x Frequency x Peak Voltage

    From the equation, you need to fill in your maximum frequency and your maximum output voltage (Vpeak) to get the minimum slew rate of the amplifier. This equation will help you in choosing amplifiers with enough slew rate for your applications.

    Another equation is for Full power Bandwidth:

                                           Full Power Bandwidth = (Slew rate) / (2π x Peak Voltage)


    This equation allows us to define the maximum frequency at which the slew limiting doesn't occur for rated voltage output.

    I hope this helps. And let us know if you have any other concerns.

    Best regards,

    Emman

  • Thanks for replie. This is the general theory found on most appnote. But, it seems to apply to ideal op amps.

    As far as i understand, to allow fast slew rate, as i tryed to explain, a internal capacitor need to be charged fast. And from what i've understood, with low power amp, the input bias is partially used to charge this capacitor. Graph in op amps datasheets showing "slew rate VS input level" can be found easily . There is different kind of curve, from really high ratio, to lower. But, i've seen this in datasheets of others brands. That's why i didn't telled much about this here, as the part that concerne me here is the ad8641.

    But those parts are bipolar opamp, so maybe it is different for JFET design. There is too a other brand appnote telling "In op amps, power consumption is traded for noise and speed. In order to increase slew rate, the bias currents within the op amp are increased."

    I've found too a op amp using two internal capacitor at different frequencies (still not a adi part).

    That why i'm suspect it to be a general rule of how are charged this internal capacitor, when op amp are low powered, and that can be a important point to look at, for this specific low level of power current, this level of slew rate, this level of input, for this bandwith.

    I know i only need only around 0.3v/us for 2V output at 10khz. As my input level is around 2-3Vpp, It could seem to have a large margin with the 3v/us of the ad8641. But it's at 10 time lower than input level of the ad8641. And, for a other op amp of the same power current, there's graph showing a ratio around 1;10 between input level and slew rate (at gain -1 and power if +/-15v).

    I'm expecting to be wrong, it seems to depend on how is charged the internal capacitor(s)...

    I've found another reference :

    Allen.Philip

    6.1 Design of CMOS opamp

    Page 248

    "The Slew Rate is generaly determinated by the maximum current available to charge or discharge a capacitance. Normally,slew rate is not limited by the output,but by the current soutcing/sinkiing capability of the first stage" So biasing input should help ? (but so need to go for ac coupled...)

    Another reference found in a datasheet:

    "Some FET input amplifiers exhibit the peculiar to the inverting input pins and output pins. Other behavior of having a larger slew rate when presented network components, such as input termination with smaller input voltage steps and slower edge resistors, should be placed close to the rates due to a change in bias conditions in the input gain-setting resistors. " (not so easy to understand english for me)

    Thanks for help

    Damien

  • The current that charges the compensation capacitor usually comes from the output of the first or second stage, not the input. This is why you can have a FET input opamp that still has very high speed, even though the input current is very small. The use of the term 'bias current' may be a source of confusion, as it may refer to a FET gate current/BJT base current or a source/emitter current. The model you describe is not actually something that most engineers bother with during day to day working, as the opamps are mostly treated as 'black box' components. Operating within the guaranteed behaviour in terms of slew, phase margin and input bias currents is critical, but I rarely bother with what's going on inside.