ADA4700 - DAC-controlled dual polarity voltage source

I've selected the ADA4700-1 in an application to drive a static charge upon a stainless steel plate (conductivity measuring instrument).  For this purpose I have two supply rails, one at +38V and the other at -38V.   The ADA4700-1 will be configured as an inverting gain stage.  There is virtually no current load on the output.

I'd like to drive the ADA4700-1 from a microprocessor's DAC output (0 to 3.3v) such that the ADA4700-1 presents +38V when the DAC drive is 0 (or +3.3) and -38V when the DAC drive goes the other way.

To make this work, I think we need to swing the DAC drive above and below 0V.  Is there any way to avoid this conversion through biasing the ADA4700-1?

Suggestions on the best way to achieve our desired result most gratefully appreciated.

  • Hi.

    Apologies for late response.

    I have done something very similar to your application in the past. So here it is.

    You will be needing a gain of 23.0303 (76/3.3) to get the output you need. R and C are optional for low pass RC filter. The output transfer function will be:

    OUT = IN ( 1 + RF/RG ) - 1.725V ( RF/RG).

    For RG you can have a parallel combination of 29.8K//30.5K or 15.073K. For RF use 332K.

    So,

    @ IN = 0 V (ZS)

    OUT = 0 - 1.725 (332/15.073) = - 37.9951V

    @ IN = 1.65 V (MS)

    OUT = 1.65 ( 1 + 332/15.073) - 37.9951 = -0.00196 V

    @ IN = 3.3 V (FS)

    OUT = 3.3 (1 + 332/15.073) - 38.9951 = 37.9917 V

    The accuracy of conversion (gain up) will depend on how tight/close the values of the resistors with respect to the computation.

    Please be careful with the supplies. ADA4700-1 is not true rail-to-rail, it has headroom in each rail. For safety please power it with 3V allowance for each output.

    Regards.

  • Pretty nifty!

    My design is a bit more complex.  Unfortunately we don't have much headroom... +-38V is it.  However, with this circuit, we achieve very close to +-37V with a buffered DAC drive.

  • Hi.

    I see. If that's your intended schematic, I would like to suggest this one.

    This will be your single stage solution. In which the use of Buffer and a Level Shifter are unnecessary, so you will save two op-amps.

    This circuit will follow a circuit transfer function of:

    OUT = IN (1 + RF/RTH) - VTH (RF/RTH)

    To compute for the values, see below.

    >>For  RF/RTH

    Gain(non-inverting) = (36 - -36)/3.3 = 72/3.3 = 21.81818182

    Gain(inverting) = Gain (non-inverting) - 1 = 20.81818182 = RF/RTH

    >>For VTH ;

    @ IN = 0 , OUT = -36 V

    -36 V = 0 - VTH (RF/RTH)

    VTH = 1.729257642 V

    >>For R1, R2 and RF;

    VTH = 3.3 V (R2 / (R1 + R2))

    1.729257642 V = 3.3 V (R2 / (R1 + R2))

    R2 / (R1 + R2) = 120/229

    So: R2 = 12.0 kΩ and R1 = 10.9 kΩ.

    RTH = R1//R2 = 5.711790393 kΩ.

    R= 20.81818182 * RTH = 108.909 kΩ

    Now:

         OUT = IN (21.81818182) - 36 V

    @ IN = 0V ; OUT = -36 V

    @ IN = 1.65 V ; OUT = 0 V

    @ IN = 3.3 V ; OUT = 36 V

    Just take note that filtering and decoupling were not included here.I also advise you read about capacitive loading section in the datasheet for more further details with regards to driving Capacitive Loads.

    Regards,

    Jino

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