When using 4310-1 or 4311-1, with PD0 and PD1 pins taking values between 0V and whatever is considered logic high, does the amplifier behave reasonably? By that does it behave without going unstable or draining excessive current or requiring excessive time to go back to the normal operation or normal inactive state? I would expect the amplifier to limit the output voltage range (signal potentially clipped) or the output impedance increase or some other behaviors, but I'm ok with those, as long as the change is gradual/continuous and the operation is reasonable.
The motivation of this question is, what if PD0 and PO1 are tied together, bypassed by a capacitor and driven by a medium impedance drive so that the time constant of that RC is on the order of tens of milliseconds? Any related information and the equivalent internal circuits around PO0, PO1 pins would be appreciated.
With PD0 and PD1 tied together, the amplifier would behave either in Full Power or Power Down mode. At each state, their is a corresponding Supply Current Consumption and Output Impedance. See Table 7 of the datasheet. In terms of timing, it will take 0.04 us to enable the output of the amplifier and 2 us to disable it. Figure 18 shows the Power-Down response of the part. With these conditions, will behave normally unless otherwise the PD0 and PD1 pins where driven by a voltage that will change the mode of the amplifier.