ADA4310-1, 4311-1 with sloped PD0, PD1

When using 4310-1 or 4311-1, with PD0 and PD1 pins taking values between 0V and whatever is considered logic high, does the amplifier behave reasonably? By that does it behave without going unstable or draining excessive current or requiring excessive time to go back to the normal operation or normal inactive state? I would expect the amplifier to limit the output voltage range (signal potentially clipped) or the output impedance increase or some other behaviors, but I'm ok with those, as long as the change is gradual/continuous and the operation is reasonable.

The motivation of this question is, what if PD0 and PO1 are tied together, bypassed by a capacitor and driven by a medium impedance drive so that the time constant of that RC is on the order of tens of milliseconds? Any related information and the equivalent internal circuits around PO0, PO1 pins would be appreciated.

  • 0
    •  Analog Employees 
    on Mar 16, 2018 12:09 AM

    Hi Ryuji,

    With PD0 and PD1 tied together, the amplifier would behave either in Full Power or Power Down mode. At each state, their is a corresponding Supply Current Consumption and Output Impedance. See Table 7 of the datasheet. In terms of timing, it will take 0.04 us to enable the output of the amplifier and 2 us to disable it. Figure 18 shows the Power-Down response of the part. With these conditions, will behave normally unless otherwise the PD0 and PD1 pins where driven by a voltage that will change the mode of the amplifier.

    Regards,

    Jino

  • Hi Jino, thank you for your reply but that actually didn't answer my question.

    I'm asking about the behavior when the PD0/1 voltage takes an intermediate value or when they vary very slowly (like a slow ramp).

    Depending on how things are controlled, some analog amps go unstable or spike the DC current. (For example, if the PD0 and PD1 affect slew rate or apparent conductance or hard clip the response in the process of complete shutdown, these things may affect the closed loop behavior. If PD pins control the bias circuit, an intermediate value may spike the current, etc... but I'm only speculating because there's no information about the internal circuit of these pins.)

    Thanks,

    Ryuji

  • 0
    •  Analog Employees 
    on Mar 25, 2018 7:19 PM

    Hi Ryuji,

    Allow me to validate this. As well as look for the equivalent internal circuitry for the Power Down pins to really check on how the part will behave at certain voltage levels.


    Thanks.

    Jino

  • 0
    •  Analog Employees 
    on Apr 23, 2018 10:19 AM

    Hi Ryuji,

    Thank you for your patience.

    PD0 and PD1 are digital (CMOS) pins with a threshold of 1.5 V. Going above or below the threshold voltage will trigger the part to change it's operating mode. It doesn't matter how much voltage you are at as long as it exceeds the threshold, it will trigger. And it takes 2us for it to change state. And no, it doesn't affect the parameters you mentioned above.


    Regards.