I am using AD536A in LTSpice simulation. I saw the waveform aplitude results coming correctly but the time it takes to settle does not match with what datasheet specifies.
I am using 0.033 uF as Cav. According to datasheet I should have got around 30 ms settling time when changing from 1 Vrms to 2 Vrms step input but getting around 200 ms time response.
Is there any problem with model ?
I am enclosing the circuit for checking. Can someone from AD verify this circuit and let me know the problem?
Input is sine wave with 1600 Hz.
Did you refer to the formula in "section2.pdf" page 18 in the link "RMS to DC Conversion Application Guide..." in the datasheet?
It states that for two pole output filter like your setup, The 1% settling time is equal to
Plugging the values from your circuit, Cav = 33nF, C2 = C3 = 1uF the computed settling time is around 163ms. The simulated settling time of 200ms is close to the computed value from the formula.
For the proper selection of values for Cav, C2 and C3, I suggest you to refer to Figure 19 on page 19 section2.pdf, the recommended values depending on your input frequency, target percent error and 1% settling time. Also, look into Table 4 page 20, the recommended Cav, C2 values are there depending on the input waveform and period.