AD8422 input bias during start-up

Hi WilliamLue ,

Can you share with us your simulation file? are we more concerned with the simulation performance?

You may need to communicate with the FAE in charge of this model to be able to properly address your concerns.

Best Regards,
Earl

Hi Earl,

No, I am more concerned with the input bias between the two input terminals of AD8422 (up to ~100 mV range) when the Vcm rises from 0 to 3.3V. It leads to a large error of amplifier output during converter start-up, which triggers the protection. The Ltspice simulation is attached. We try to solve the issue so we build the Ltspice simulation. However, the simulation circuit works correctly. Do you happen to know the way I can find the email of FAE or AE in charge of AD8422 support? I appreciate it!

DCR_sensing_AD8422_Q.asc

Hi EarlJohn ,

With the said mater, since this is not an LTspice model issue, I can only do much.

For you to be able to ask support from an FAE or AE, you can always reach out on the link below:

Contact Information | Analog Devices

I'll try my best to look for the appropriate FAE or AE that is in charge of this part, but, I cannot commit much here.

Best Regards,

Earl

Hi,

Be sure to meet the specifications for the input voltage range: VEE+1.2V to VCC−1.5V. If the input voltage falls outside of this, the input may draw considerable current and therefore develop voltage between the inputs by flowing through the external resistors. Also test your configuration using the Instrumentation Amplifier Diamond Plot Tool, that could help a lot as well.

Zoltan