Noise simulation is way of from what is claimed in the link.

Question

Hello ADI team, 
 
 I am running a simulation on possibility of paralleling AD8428s instrumentation amplifiers to reduce the noise density. But my LTspice simulation are very off, could you please let me know what is going wrong with my circuit. I am following up this design excercise https://www.analog.com/en/resources/analog-dialogue/articles/low-noise-inamp-nanovolt-sensitivity.html 
 Please look into this and let me know. 
 
 Thanks and Regards, 
 Sumeet

GLADION · Accepted Answer

Hi Sumeet6 , 
 Good day. I tried specifically modifying the circuit you had on the input stage. Please see the attached file for reference. Also, you should be able to obtain the RTI noise plot by dividing the RTO noise plot by the gain of 2000. 
 
 As you can see here, the noise plot correlates to what is being presented in the paper. Thank you. 
 AD8428_v2.asc 
 Regards, Gilbeys)

Popular Forums

Product Forums

Application Forums

Design Center Forums

Highlighted Webinar

Places

Libraries

Latest Webinars

Challenge Yourself!

What's Brewing

Places

Resources

Highlighted Blogs

Latest Blogs

ADI Blogs

Visit ContentZone

Featured Content

View Content By Industry

View Content By Technology

Products Mentioned

Thread Details

Noise simulation is way of from what is claimed in the link.