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# AD8220 shift phase

Category: Hardware

Hello All,

I'm working on RLC meter. I use AD8220 at my project like current sense. I measure voltage drop at the shunt.

I have problem with phase shift in big value of gain from, more than 100.

I would like to measure current with bigger gain due to keep low value of shunt. High value of shunt will move the phase at measured impedance.

I did simulation at LTspice and looks like the same like real measurement.

Could you tell why AD8220 introduce phase shift at the higher value of gain, please?

Thank you in advance.

Best regards,

Mateusz

[edited by: MateuszPL at 3:47 PM (GMT -5) on 1 Feb 2023]
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• Hi Mateusz,

I think the phase shift is in the current flowing through R5. Since you measure the voltage drop on R5, this is an output of a simple RC high pass filter formed by R5 and the capacitors connected to it, at least C5 via the small R8 (it is not on your schematic where else the right terminal of R5 is connected, but the MUX also adds its input capacitance). Using your data at gain of 100 it seems that on R5 you have a voltage amplitude of about 160uV. Taking the 400mV input amplitude and the high-pass filter transfer function one gets about 120pF load, so quite close to the value of C5.

If you plot V1 and the current of R5, I guess you'll see the phase shift, so I don't think it is due to the AD8220. See this simple simulation that illustrates the above:

Zoltan

• Hello Zoltan,

there is normal than there is phase shift between current and voltage when we have reactance component, but I'm talking about different things. Based on above screenshots from LTspice you can observe that phase shift changed with gain of AD8220.
Have you got any idea why phase shift with bigger gain of AD8220?
Thank you in advance.
Best regards,
Mateusz

• Hi Mateusz,

I recommend you to plot the current of R5 and the output of the inamp simultaneously. Then you'll see more easily how much is the phase shift introduced by the inamp (I do not see much). Use the cursors in LTSpice to measure it accurately and share your results here. So, the timeshift numerical values for the gains you are interested in.

Zoltan

• Hello Zoltan,
Ok, I can see, but come back to my screenshots.
Could you describe me why there is phase shift change with gain change, please?

Best regards,
Mateusz

• Hi,

It is too hard to read what is the time difference, because it includes the large shift caused by the high-pass filter and the signals do not have the same DC value. Let's see, how much is the difference, then there is chance to find out the reason. I do not see significant phase shift on the plots other than what is due to the HPF.

Zoltan

• Hi,

I've tried to estimate the phase shift caused by the inamp from your plot for gain=824. Would be better to see nunbers, anyway, I've used your plot:

The short red line is the shift, the long is the period. I estimate the shift to be about 0,01ms, the period is 0,2ms. So, the shift is only 5% of the period. The reason is the inamp transfer function. The bandwidth at gain of 1000 is fp=14kHz, follows a first order low pass chaarcteristics. Therefore the phase shift is given as arctan(f/fp) = arctan(5kHz/14kHz)≈0.322 rad. so, the calculated time shift is 0.322/(2*pi)*0,2ms≈0,01ms. Just the same what you can see on your plot.

In summary: the large phase shift (close to 90º) is caused by the passive components, the high pass characteristics. The small shift (5% of the period) at high gains is due to the limited bandwidth of the inamp.

I hope now all of your questons are answered.

Zoltan

• Hello Zoltan,
thank you for your response. I removed input filter to AD8220, but still you can observe the phase difference between high and low gain. I explained that below based on screenshot from LTspice and calculation.

Could you take a look, please?

Thank you in advance.

Schematic looks like below:

Schematic:

Below you can observe curve for Rg=820

And Rg=62:

Phase shift:
Rg=820:
delta_t=3,2489442ms-3,2035961ms=0,0453ms
delta_degree=180*1,42/PI=81,6

Rg=62:
delta_t=3,251087ms-3,2119565ms=0,0391ms
delta_degree=180*1,23/PI=70,4

Best regards,
Mateusz

• Hi,

You can't remove all of the capacitors, the inamp and MUX have input capacitance.

C1 can also have some effect, you can calculate how much. And it is still not clear where else the right terminal of R5 is connected, so you can have some more capacitance there.

But I think you should consider what you really need. If you AC couple the right terminal of R5, you'll always have this effect.

Just a note. it is good to have the RFI filtering capacitors and resistors R7 and R8 (what you have removed temporarily), but 10Ohm is too small to have any effect. See the RF INTERFERENCE section in the datasheet (you'll also see the input capacitors there).

Zoltan

• Zoltan,
I know all of this capacitance etc. Look, at the same circuit, but with different gain we have different phase shift, according to my calculation. I changed only gain resistor, I didn't change anything in schematic, but there is phase shift.
Did you catch my point?

Best ragards,
Mateusz

• Hi,
I thought it is clear, that the reason for the inamps small shift is related to the inamp bandwidth, I've even shown you the formula. If you take your time and look at the datasheet, you can easily see, that the bandwidth depends on the gain - which is a very common thing for opamps and inamps:

Therefore the phase shift depends on the gain, too. At  lower the gain the bandwidth is higher, therefore the phase shift is smaller. But it is only a few percent of the shift compared to the shift caused by the capacitors.

The inamp's shift is predictable and much smaller than the HPF shift. In addition, the latter is more uncertain, since you do not know the capacitor values precisely. So I'm sure that you should take more care of the latter.

Zoltan