I want to use DRL in collecting EMG signals, but now i meet some problems. It is clearly that there is only bottom noise when input the vacancy. And we can get EMG signals including power frequency noise when the input is plugged into the body. So a right leg dirven is needed to decrease it. Then i design the DRL circuit by referring to the datasheet of AD620(by the way, there is no DRL circuit in application of datasheet of AD623). I use 3.3V single power supply and the dc voltage of gain setting resistor is also 3.3V, which results in DRL circiut output voltage saturation. And the output of total circuit is the similar to when input the vacancy. that is noly bottom noise. I want to know what is wrong with my circuit and how to deal with the dc voltage in gain setting resistor(a big dc voltage can result in DRL output saturation).
Thank you in advance.